mirror of
https://github.com/Polprzewodnikowy/SummerCart64.git
synced 2025-01-07 10:18:13 +01:00
137 lines
3.2 KiB
ArmAsm
137 lines
3.2 KiB
ArmAsm
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#include "exception.h"
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.section .text.exception_handler
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exception_handler:
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.set noat
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la $k0, (_esp - SAVE_REGISTERS_SIZE)
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sd $at, AT_OFFSET($k0)
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sd $v0, V0_OFFSET($k0)
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sd $v1, V1_OFFSET($k0)
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sd $a0, A0_OFFSET($k0)
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sd $a1, A1_OFFSET($k0)
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sd $a2, A2_OFFSET($k0)
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sd $a3, A3_OFFSET($k0)
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sd $t0, T0_OFFSET($k0)
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sd $t1, T1_OFFSET($k0)
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sd $t2, T2_OFFSET($k0)
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sd $t3, T3_OFFSET($k0)
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sd $t4, T4_OFFSET($k0)
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sd $t5, T5_OFFSET($k0)
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sd $t6, T6_OFFSET($k0)
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sd $t7, T7_OFFSET($k0)
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sd $s0, S0_OFFSET($k0)
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sd $s1, S1_OFFSET($k0)
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sd $s2, S2_OFFSET($k0)
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sd $s3, S3_OFFSET($k0)
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sd $s4, S4_OFFSET($k0)
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sd $s5, S5_OFFSET($k0)
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sd $s6, S6_OFFSET($k0)
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sd $s7, S7_OFFSET($k0)
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sd $t8, T8_OFFSET($k0)
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sd $t9, T9_OFFSET($k0)
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sd $gp, GP_OFFSET($k0)
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sd $sp, SP_OFFSET($k0)
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sd $fp, FP_OFFSET($k0)
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sd $ra, RA_OFFSET($k0)
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.set at
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move $sp, $k0
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exception_is_fatal:
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mfc0 $a0, C0_CAUSE
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sw $a0, C0_CAUSE_OFFSET($k0)
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move $a1, $a0
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andi $a1, EXCEPTION_CODE_MASK
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srl $a1, $a1, EXCEPTION_CODE_BIT
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beq $a1, $zero, exception_interrupt
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exception_fatal:
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sd $k0, K0_OFFSET($k0)
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sd $k1, K1_OFFSET($k0)
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mfc0 $t0, C0_STATUS
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sw $t0, C0_STATUS_OFFSET($k0)
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dmfc0 $t0, C0_EPC
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sd $t0, C0_EPC_OFFSET($k0)
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addiu $t0, 4
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dmtc0 $t0, C0_EPC
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move $a0, $k0
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la $t1, exception_fatal_handler
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jalr $t1
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j exception_restore
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exception_interrupt:
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andi $a0, INTERRUPT_PENDING_MASK
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srl $a0, $a0, INTERRUPT_PENDING_BIT
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la $t1, exception_interrupt_handler
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jalr $t1
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exception_restore:
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.set noat
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ld $at, AT_OFFSET($k0)
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ld $v0, V0_OFFSET($k0)
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ld $v1, V1_OFFSET($k0)
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ld $a0, A0_OFFSET($k0)
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ld $a1, A1_OFFSET($k0)
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ld $a2, A2_OFFSET($k0)
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ld $a3, A3_OFFSET($k0)
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ld $t0, T0_OFFSET($k0)
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ld $t1, T1_OFFSET($k0)
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ld $t2, T2_OFFSET($k0)
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ld $t3, T3_OFFSET($k0)
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ld $t4, T4_OFFSET($k0)
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ld $t5, T5_OFFSET($k0)
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ld $t6, T6_OFFSET($k0)
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ld $t7, T7_OFFSET($k0)
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ld $s0, S0_OFFSET($k0)
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ld $s1, S1_OFFSET($k0)
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ld $s2, S2_OFFSET($k0)
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ld $s3, S3_OFFSET($k0)
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ld $s4, S4_OFFSET($k0)
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ld $s5, S5_OFFSET($k0)
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ld $s6, S6_OFFSET($k0)
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ld $s7, S7_OFFSET($k0)
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ld $t8, T8_OFFSET($k0)
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ld $t9, T9_OFFSET($k0)
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ld $gp, GP_OFFSET($k0)
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ld $sp, SP_OFFSET($k0)
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ld $fp, FP_OFFSET($k0)
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ld $ra, RA_OFFSET($k0)
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.set at
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eret
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.section .text.exception_vector
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exception_vector:
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.set noreorder
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la $k0, exception_handler
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jalr $k1, $k0
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nop
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.equ exception_vector_size, (. - exception_vector)
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.set reorder
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.section .text.exception_install
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exception_install:
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.global exception_install
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la $t0, exception_vector
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li $t1, VECTOR_LOCATION
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li $t2, (VECTOR_SIZE * VECTOR_NUM)
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add $t2, $t2, $t1
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1:
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move $t3, $t0
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move $t4, $t1
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li $t5, exception_vector_size
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add $t5, $t5, $t4
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2:
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lw $t6, 0($t3)
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sw $t6, 0($t4)
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cache HIT_INVALIDATE_I, 0($t4)
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addiu $t3, 4
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addiu $t4, 4
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bne $t4, $t5, 2b
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addiu $t1, VECTOR_SIZE
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bne $t1, $t2, 1b
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jr $ra
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