SummerCart64/fw/picorv32/scripts/yosys/synth_gates.ys

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2021-08-05 19:50:29 +02:00
read_verilog synth_gates.v
read_verilog ../../picorv32.v
hierarchy -top top
proc; flatten
synth
dfflibmap -prepare -liberty synth_gates.lib
abc -dff -liberty synth_gates.lib
dfflibmap -liberty synth_gates.lib
stat
write_blif synth_gates.blif