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https://github.com/Polprzewodnikowy/SummerCart64.git
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[SC64][SW][SL64] Cleanup boot process
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0ad2350233
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05f70373e9
@ -66,7 +66,7 @@ tv_type_t boot_get_tv_type(cart_header_t *cart_header) {
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}
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}
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}
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}
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void boot(cic_type_t cic_type, tv_type_t tv_type) {
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void boot(cart_header_t *cart_header, cic_type_t cic_type, tv_type_t tv_type) {
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tv_type_t os_tv_type = tv_type == E_TV_TYPE_UNKNOWN ? OS_BOOT_CONFIG->tv_type : tv_type;
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tv_type_t os_tv_type = tv_type == E_TV_TYPE_UNKNOWN ? OS_BOOT_CONFIG->tv_type : tv_type;
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volatile uint64_t gpr_regs[32];
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volatile uint64_t gpr_regs[32];
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@ -95,36 +95,29 @@ void boot(cic_type_t cic_type, tv_type_t tv_type) {
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AI->dram_addr = 0;
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AI->dram_addr = 0;
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AI->len = 0;
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AI->len = 0;
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while (SP->status & SP_STATUS_DMA_BUSY);
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PI->dom1_lat = cart_header->pi_conf & 0xFF;
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PI->dom1_pwd = cart_header->pi_conf >> 8;
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PI->dom1_pgs = cart_header->pi_conf >> 16;
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PI->dom1_rls = cart_header->pi_conf >> 20;
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if (DP_CMD->status & DP_CMD_STATUS_XBUS_DMEM_DMA) {
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if (DP_CMD->status & DP_CMD_STATUS_XBUS_DMEM_DMA) {
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while (DP_CMD->status & DP_CMD_STATUS_PIPE_BUSY);
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while (DP_CMD->status & DP_CMD_STATUS_PIPE_BUSY);
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}
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}
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DP_CMD->status = DP_CMD_STATUS_CLEAR_FLUSH | DP_CMD_STATUS_CLEAR_FREEZE | DP_CMD_STATUS_CLEAR_XBUS_DMEM_DMA;
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for (size_t i = 0; i < ARRAY_ITEMS(cart_header->boot_code); i++) {
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SP_MEM->dmem[16 + i] = cart_header->boot_code[i];
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for (size_t i = 0; i < ARRAY_ITEMS(SP_MEM->dmem); i++) {
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SP_MEM->dmem[i] = CART[i];
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}
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}
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while (PI->status & (PI_STATUS_IO_BUSY | PI_STATUS_DMA_BUSY));
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// CIC X105 based games checks if start of IPL2 code exists in SP IMEM
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PI->status = PI_STATUS_CLEAR_INTERRUPT | PI_STATUS_RESET_CONTROLLER;
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SP_MEM->imem[0] = 0x3C0DBFC0; // lui t5, 0xBFC0
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SP_MEM->imem[1] = 0x8DA807FC; // lw t0, 0x07FC(t5)
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for (size_t i = 0; i < ARRAY_ITEMS(SP_MEM->imem); i++) {
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SP_MEM->imem[2] = 0x25AD07C0; // addiu t5, t5, 0x07C0
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SP_MEM->imem[i] = 0;
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SP_MEM->imem[3] = 0x31080080; // andi t0, t0, 0x0080
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}
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SP_MEM->imem[4] = 0x5500FFFC; // bnel t0, zero, &SP_MEM->imem[0]
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SP_MEM->imem[5] = 0x3C0DBFC0; // lui t5, 0xBFC0
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if (cic_type == E_CIC_TYPE_X105) {
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SP_MEM->imem[6] = 0x8DA80024; // lw t0, 0x0024(t5)
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SP_MEM->imem[0] = 0x3C0DBFC0;
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SP_MEM->imem[7] = 0x3C0BB000; // lui t3, 0xB000
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SP_MEM->imem[1] = os_tv_type == E_TV_TYPE_PAL ? 0xBDA807FC : 0x8DA807FC;
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SP_MEM->imem[2] = 0x25AD07C0;
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SP_MEM->imem[3] = 0x31080080;
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SP_MEM->imem[4] = 0x5500FFFC;
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SP_MEM->imem[5] = 0x3C0DBFC0;
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SP_MEM->imem[6] = 0x8DA80024;
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SP_MEM->imem[7] = 0x3C0BB000;
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}
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if (cic_type == E_CIC_TYPE_X105) {
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if (cic_type == E_CIC_TYPE_X105) {
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OS_BOOT_CONFIG->mem_size_6105 = OS_BOOT_CONFIG->mem_size;
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OS_BOOT_CONFIG->mem_size_6105 = OS_BOOT_CONFIG->mem_size;
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@ -139,7 +132,7 @@ void boot(cic_type_t cic_type, tv_type_t tv_type) {
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gpr_regs[CPU_REG_S4] = os_tv_type;
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gpr_regs[CPU_REG_S4] = os_tv_type;
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gpr_regs[CPU_REG_S5] = OS_BOOT_CONFIG->reset_type;
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gpr_regs[CPU_REG_S5] = OS_BOOT_CONFIG->reset_type;
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gpr_regs[CPU_REG_S6] = BOOT_SEED_IPL3(cic_seeds[cic_type]);
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gpr_regs[CPU_REG_S6] = BOOT_SEED_IPL3(cic_seeds[cic_type]);
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gpr_regs[CPU_REG_S7] = (os_tv_type == E_TV_TYPE_PAL) ? OS_BOOT_VERSION_PAL : OS_BOOT_VERSION_NTSC;
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gpr_regs[CPU_REG_S7] = BOOT_SEED_OS_VERSION(cic_seeds[cic_type]);
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gpr_regs[CPU_REG_SP] = CPU_ADDRESS_IN_REG(SP_MEM->imem[ARRAY_ITEMS(SP_MEM->imem) - 4]);
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gpr_regs[CPU_REG_SP] = CPU_ADDRESS_IN_REG(SP_MEM->imem[ARRAY_ITEMS(SP_MEM->imem) - 4]);
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gpr_regs[CPU_REG_RA] = CPU_ADDRESS_IN_REG(SP_MEM->imem[(os_tv_type == E_TV_TYPE_PAL) ? 341 : 340]);
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gpr_regs[CPU_REG_RA] = CPU_ADDRESS_IN_REG(SP_MEM->imem[(os_tv_type == E_TV_TYPE_PAL) ? 341 : 340]);
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@ -19,6 +19,7 @@
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#define BOOT_SEED_8303 (0x0000DD00)
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#define BOOT_SEED_8303 (0x0000DD00)
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#define BOOT_SEED_IPL3(x) (((x) & 0x0000FF00) >> 8)
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#define BOOT_SEED_IPL3(x) (((x) & 0x0000FF00) >> 8)
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#define BOOT_SEED_OS_VERSION(x) (((x) & 0x00040000) >> 18)
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typedef enum cic_type_e {
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typedef enum cic_type_e {
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E_CIC_TYPE_UNKNOWN,
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E_CIC_TYPE_UNKNOWN,
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@ -79,12 +80,9 @@ typedef struct os_boot_config_s os_boot_config_t;
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#define OS_BOOT_ROM_TYPE_GAME_PAK (0)
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#define OS_BOOT_ROM_TYPE_GAME_PAK (0)
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#define OS_BOOT_ROM_TYPE_DD (1)
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#define OS_BOOT_ROM_TYPE_DD (1)
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#define OS_BOOT_VERSION_NTSC (0)
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#define OS_BOOT_VERSION_PAL (6)
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cart_header_t *boot_load_cart_header(void);
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cart_header_t *boot_load_cart_header(void);
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cic_type_t boot_get_cic_type(cart_header_t *cart_header);
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cic_type_t boot_get_cic_type(cart_header_t *cart_header);
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tv_type_t boot_get_tv_type(cart_header_t *cart_header);
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tv_type_t boot_get_tv_type(cart_header_t *cart_header);
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void boot(cic_type_t cic_type, tv_type_t tv_type);
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void boot(cart_header_t *cart_header, cic_type_t cic_type, tv_type_t tv_type);
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#endif
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#endif
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@ -12,11 +12,10 @@ int main(void) {
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cic_type_t cic_type = sc64_get_cic_type();
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cic_type_t cic_type = sc64_get_cic_type();
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tv_type_t tv_type = sc64_get_tv_type();
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tv_type_t tv_type = sc64_get_tv_type();
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if (cic_type == E_CIC_TYPE_UNKNOWN || tv_type == E_TV_TYPE_UNKNOWN) {
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// Try to guess CIC and TV type from ROM in SDRAM if no override is provided
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cart_header_t *cart_header = boot_load_cart_header();
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cart_header_t *cart_header = boot_load_cart_header();
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// Try to guess CIC and TV type from ROM in SDRAM if no override is provided
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if (cic_type == E_CIC_TYPE_UNKNOWN || tv_type == E_TV_TYPE_UNKNOWN) {
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if (cic_type == E_CIC_TYPE_UNKNOWN) {
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if (cic_type == E_CIC_TYPE_UNKNOWN) {
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cic_type = boot_get_cic_type(cart_header);
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cic_type = boot_get_cic_type(cart_header);
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}
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}
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@ -28,5 +27,5 @@ int main(void) {
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disable_interrupts();
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disable_interrupts();
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boot(cic_type, tv_type);
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boot(cart_header, cic_type, tv_type);
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}
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}
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