mirror of
https://github.com/Polprzewodnikowy/SummerCart64.git
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cleanup
This commit is contained in:
parent
281137f9f1
commit
1e98c669bd
@ -19,7 +19,7 @@
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#
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#
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# Quartus Prime
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# Quartus Prime
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# Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition
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# Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition
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# Date created = 00:28:50 September 07, 2021
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# Date created = 21:23:28 September 18, 2021
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#
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#
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# -------------------------------------------------------------------------- #
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# -------------------------------------------------------------------------- #
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#
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#
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@ -191,7 +191,7 @@ set_global_assignment -name TIMING_ANALYZER_MULTICORNER_ANALYSIS ON
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# Compiler Assignments
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# Compiler Assignments
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# ====================
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# ====================
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set_global_assignment -name OPTIMIZATION_MODE "HIGH PERFORMANCE EFFORT"
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set_global_assignment -name OPTIMIZATION_MODE BALANCED
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# Analysis & Synthesis Assignments
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# Analysis & Synthesis Assignments
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# ================================
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# ================================
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@ -3,7 +3,7 @@ CC = $(TOOLCHAIN)gcc
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OBJCOPY = $(TOOLCHAIN)objcopy
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OBJCOPY = $(TOOLCHAIN)objcopy
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SIZE = $(TOOLCHAIN)size
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SIZE = $(TOOLCHAIN)size
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FLAGS = -mabi=ilp32 -march=rv32i
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FLAGS = -mabi=ilp32 -march=rv32i $(USER_FLAGS)
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CFLAGS = -Os -Wall -ffunction-sections -fdata-sections -ffreestanding -MMD -MP
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CFLAGS = -Os -Wall -ffunction-sections -fdata-sections -ffreestanding -MMD -MP
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LDFLAGS = -nostartfiles -Wl,--gc-sections
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LDFLAGS = -nostartfiles -Wl,--gc-sections
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@ -17,7 +17,9 @@ DEPS = $(OBJS:.o=.d)
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VPATH = $(SRC_DIR)
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VPATH = $(SRC_DIR)
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all: make_output_dir $(BOOTLOADER_DIR)/cpu_bootloader.sv $(BUILD_DIR)/controller.rom
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$(@info $(shell mkdir -p ./$(BUILD_DIR) &> /dev/null))
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all: $(BOOTLOADER_DIR)/cpu_bootloader.sv $(BUILD_DIR)/controller.rom
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$(BUILD_DIR)/%.o: %.c
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$(BUILD_DIR)/%.o: %.c
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$(CC) $(FLAGS) $(CFLAGS) -c $< -o $@
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$(CC) $(FLAGS) $(CFLAGS) -c $< -o $@
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@ -32,21 +34,18 @@ $(BUILD_DIR)/controller.rom: $(BUILD_DIR)/uc.elf
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@echo 'Size of controller modules:'
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@echo 'Size of controller modules:'
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@$(SIZE) -B -t --common $(OBJS)
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@$(SIZE) -B -t --common $(OBJS)
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@echo 'Size of controller:'
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@echo 'Size of controller:'
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@$(SIZE) -B build/controller.elf
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@$(SIZE) -B $(BUILD_DIR)/controller.elf
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$(BOOTLOADER_DIR)/cpu_bootloader.sv: $(BUILD_DIR)/uc.elf
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$(BOOTLOADER_DIR)/cpu_bootloader.sv: $(BUILD_DIR)/uc.elf
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$(OBJCOPY) -j .bootloader $(BUILD_DIR)/uc.elf $(BUILD_DIR)/bootloader.elf
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$(OBJCOPY) -j .bootloader $(BUILD_DIR)/uc.elf $(BUILD_DIR)/bootloader.elf
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$(OBJCOPY) -O binary $(BUILD_DIR)/bootloader.elf $(BUILD_DIR)/bootloader.bin
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$(OBJCOPY) -O binary $(BUILD_DIR)/bootloader.elf $(BUILD_DIR)/bootloader.bin
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python3 tools/bin2sv.py tools/cpu_bootloader_template.sv $@ < $(BUILD_DIR)/bootloader.bin
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python3 tools/bin2sv.py tools/cpu_bootloader_template.sv $@ < $(BUILD_DIR)/bootloader.bin
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@echo 'Size of bootloader:'
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@echo 'Size of bootloader:'
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@$(SIZE) -B build/bootloader.elf
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@$(SIZE) -B $(BUILD_DIR)/bootloader.elf
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make_output_dir:
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@$(shell mkdir ./$(BUILD_DIR) 2> /dev/null)
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clean:
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clean:
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rm -rf build
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rm -rf ./$(BUILD_DIR)/*
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.PHONY: all make_output_dir clean
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.PHONY: all clean
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-include $(DEPS)
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-include $(DEPS)
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@ -89,6 +89,7 @@ static void set_save_type (enum save_type save_type) {
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change_scr_bits(CFG_SCR_FLASHRAM_EN, true);
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change_scr_bits(CFG_SCR_FLASHRAM_EN, true);
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break;
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break;
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default:
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default:
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save_type = SAVE_TYPE_NONE;
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break;
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break;
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}
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}
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@ -171,8 +172,10 @@ void cfg_query (uint32_t *args) {
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void cfg_init (void) {
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void cfg_init (void) {
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set_save_type(SAVE_TYPE_NONE);
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set_save_type(SAVE_TYPE_NONE);
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CFG->DD_OFFSET = DEFAULT_DD_OFFSET;
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CFG->DD_OFFSET = DEFAULT_DD_OFFSET;
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CFG->SCR = CFG_SCR_CPU_READY | CFG_SCR_SDRAM_SWITCH;
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CFG->SCR = CFG_SCR_CPU_READY | CFG_SCR_SDRAM_SWITCH;
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p.cic_seed = 0xFFFF;
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p.cic_seed = 0xFFFF;
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p.tv_type = 0x03;
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p.tv_type = 0x03;
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}
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}
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@ -31,15 +31,15 @@
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static void joybus_rx (uint8_t *data) {
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static void joybus_rx (uint8_t *data) {
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uint32_t rx_length = (JOYBUS->SCR & JOYBUS_SCR_RX_LENGTH_MASK) >> JOYBUS_SCR_RX_LENGTH_BIT;
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size_t rx_length = (JOYBUS->SCR & JOYBUS_SCR_RX_LENGTH_MASK) >> JOYBUS_SCR_RX_LENGTH_BIT;
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for (size_t i = 0; i < rx_length; i++) {
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for (size_t i = 0; i < rx_length; i++) {
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data[i] = ((uint8_t *) JOYBUS->DATA)[(10 - rx_length) + i];
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data[i] = ((uint8_t *) (JOYBUS->DATA))[(10 - rx_length) + i];
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}
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}
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}
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}
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static void joybus_tx (uint8_t *data, size_t length) {
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static void joybus_tx (uint8_t *data, size_t length) {
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for (size_t i = 0; i < ((length + 3) / 4); i++) {
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for (size_t i = 0; i < ((length + 3) / 4); i++) {
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JOYBUS->DATA[i] = ((uint32_t *) data)[i];
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JOYBUS->DATA[i] = ((uint32_t *) (data))[i];
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}
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}
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JOYBUS->SCR = ((length * 8) << JOYBUS_SCR_TX_LENGTH_BIT) | JOYBUS_SCR_TX_START;
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JOYBUS->SCR = ((length * 8) << JOYBUS_SCR_TX_LENGTH_BIT) | JOYBUS_SCR_TX_START;
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}
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}
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@ -61,6 +61,7 @@ void joybus_set_eeprom (enum eeprom_type eeprom_type) {
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void joybus_init (void) {
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void joybus_init (void) {
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JOYBUS->SCR = JOYBUS_SCR_TX_RESET | JOYBUS_SCR_RX_RESET;
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JOYBUS->SCR = JOYBUS_SCR_TX_RESET | JOYBUS_SCR_RX_RESET;
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p.eeprom_type = EEPROM_NONE;
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p.eeprom_type = EEPROM_NONE;
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p.rtc_running = true;
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p.rtc_running = true;
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p.rtc_write_protect = RTC_WP_MASK;
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p.rtc_write_protect = RTC_WP_MASK;
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@ -120,9 +121,9 @@ void process_joybus (void) {
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}
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}
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} else if (rx_data[1] == RTC_BLOCK_TIME) {
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} else if (rx_data[1] == RTC_BLOCK_TIME) {
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rtc_time_t *rtc_time = rtc_get_time();
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rtc_time_t *rtc_time = rtc_get_time();
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tx_data[0] = rtc_time->seconds;
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tx_data[0] = rtc_time->second;
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tx_data[1] = rtc_time->minutes;
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tx_data[1] = rtc_time->minute;
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tx_data[2] = rtc_time->hours | 0x80;
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tx_data[2] = rtc_time->hour | 0x80;
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tx_data[4] = rtc_time->weekday - 1;
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tx_data[4] = rtc_time->weekday - 1;
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tx_data[3] = rtc_time->day;
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tx_data[3] = rtc_time->day;
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tx_data[5] = rtc_time->month;
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tx_data[5] = rtc_time->month;
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@ -139,9 +140,9 @@ void process_joybus (void) {
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p.rtc_running = (!(rx_data[3] & RTC_ST));
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p.rtc_running = (!(rx_data[3] & RTC_ST));
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} else if (rx_data[1] == RTC_BLOCK_TIME && (!(p.rtc_write_protect & RTC_WP_TIME))) {
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} else if (rx_data[1] == RTC_BLOCK_TIME && (!(p.rtc_write_protect & RTC_WP_TIME))) {
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rtc_time_t rtc_time;
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rtc_time_t rtc_time;
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rtc_time.seconds = rx_data[2];
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rtc_time.second = rx_data[2];
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rtc_time.minutes = rx_data[3];
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rtc_time.minute = rx_data[3];
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rtc_time.hours = rx_data[4] & 0x7F;
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rtc_time.hour = rx_data[4] & 0x7F;
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rtc_time.weekday = rx_data[6] + 1;
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rtc_time.weekday = rx_data[6] + 1;
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rtc_time.day = rx_data[5];
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rtc_time.day = rx_data[5];
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rtc_time.month = rx_data[7];
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rtc_time.month = rx_data[7];
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} else if (p.time_valid) {
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} else if (p.time_valid) {
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p.running = p.data[RTCSEC] & RTCSEC_ST;
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p.running = p.data[RTCSEC] & RTCSEC_ST;
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sanitize_time(p.data);
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sanitize_time(p.data);
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p.time.seconds = p.data[RTCSEC];
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p.time.second = p.data[RTCSEC];
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p.time.minutes = p.data[RTCMIN];
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p.time.minute = p.data[RTCMIN];
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p.time.hours = p.data[RTCHOUR];
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p.time.hour = p.data[RTCHOUR];
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p.time.weekday = p.data[RTCWKDAY];
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p.time.weekday = p.data[RTCWKDAY];
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p.time.day = p.data[RTCDATE];
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p.time.day = p.data[RTCDATE];
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p.time.month = p.data[RTCMTH];
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p.time.month = p.data[RTCMTH];
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p.i2c_write = true;
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p.i2c_write = true;
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p.i2c_length = 7;
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p.i2c_length = 7;
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p.data[0] = RTCMIN;
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p.data[0] = RTCMIN;
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p.data[1] = p.time.minutes;
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p.data[1] = p.time.minute;
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p.data[2] = p.time.hours;
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p.data[2] = p.time.hour;
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p.data[3] = p.time.weekday | RTCWKDAY_VBAT;
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p.data[3] = p.time.weekday | RTCWKDAY_VBAT;
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p.data[4] = p.time.day;
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p.data[4] = p.time.day;
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p.data[5] = p.time.month;
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p.data[5] = p.time.month;
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@ -177,7 +177,7 @@ void process_rtc (void) {
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p.i2c_length = 2;
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p.i2c_length = 2;
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p.i2c_first_read_done = false;
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p.i2c_first_read_done = false;
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p.data[0] = RTCSEC;
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p.data[0] = RTCSEC;
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p.data[1] = p.time.seconds | RTCSEC_ST;
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p.data[1] = p.time.second | RTCSEC_ST;
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p.rtc_phase = RTC_PHASE_WAIT_START;
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p.rtc_phase = RTC_PHASE_WAIT_START;
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break;
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break;
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typedef struct {
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typedef struct {
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uint8_t seconds;
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uint8_t second;
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uint8_t minutes;
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uint8_t minute;
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uint8_t hours;
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uint8_t hour;
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uint8_t weekday;
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uint8_t weekday;
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uint8_t day;
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uint8_t day;
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uint8_t month;
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uint8_t month;
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#include <stdbool.h>
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#include <stdbool.h>
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#define DEBUG_ENABLED
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typedef volatile uint8_t io8_t;
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typedef volatile uint8_t io8_t;
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typedef volatile uint32_t io32_t;
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typedef volatile uint32_t io32_t;
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#include "uart.h"
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#include "uart.h"
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#include "rtc.h"
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#include "rtc.h"
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#ifdef DEBUG_ENABLED
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#ifdef DEBUG
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static const char hex_char_map[16] = {
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static const char hex_char_map[16] = {
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'0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'A', 'B', 'C', 'D', 'E', 'F'
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'0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'A', 'B', 'C', 'D', 'E', 'F'
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};
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};
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#endif
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void uart_print (const char *text) {
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void uart_print (const char *text) {
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#ifdef DEBUG
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while (*text != '\0') {
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while (*text != '\0') {
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while (!(UART->SCR & UART_SCR_TXE));
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while (!(UART->SCR & UART_SCR_TXE));
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UART->DR = *text++;
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UART->DR = *text++;
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}
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}
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#endif
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}
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}
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void uart_print_02hex (uint8_t number) {
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void uart_print_02hex (uint8_t number) {
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#ifdef DEBUG
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char buffer[3];
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char buffer[3];
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buffer[0] = hex_char_map[(number >> 4) & 0x0F];
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buffer[0] = hex_char_map[(number >> 4) & 0x0F];
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buffer[1] = hex_char_map[number & 0x0F];
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buffer[1] = hex_char_map[number & 0x0F];
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buffer[2] = '\0';
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buffer[2] = '\0';
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uart_print(buffer);
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uart_print(buffer);
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#endif
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}
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}
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void uart_print_08hex (uint32_t number) {
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void uart_print_08hex (uint32_t number) {
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#ifdef DEBUG
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uart_print_02hex((number >> 24) & 0xFF);
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uart_print_02hex((number >> 24) & 0xFF);
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uart_print_02hex((number >> 16) & 0xFF);
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uart_print_02hex((number >> 16) & 0xFF);
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uart_print_02hex((number >> 8) & 0xFF);
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uart_print_02hex((number >> 8) & 0xFF);
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uart_print_02hex((number >> 0) & 0xFF);
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uart_print_02hex((number >> 0) & 0xFF);
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}
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#endif
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#endif
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}
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void uart_init (void) {
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void uart_init (void) {
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#ifdef DEBUG_ENABLED
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#ifdef DEBUG
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uart_print("App ready!\n");
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uart_print("App ready!\n");
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#endif
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#endif
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}
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}
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void process_uart (void) {
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void process_uart (void) {
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#ifdef DEBUG_ENABLED
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#ifdef DEBUG
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rtc_time_t *time;
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rtc_time_t *time;
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if (UART->SCR & USB_SCR_RXNE) {
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if (UART->SCR & USB_SCR_RXNE) {
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@ -83,6 +83,7 @@ static struct process p;
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void usb_init (void) {
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void usb_init (void) {
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USB->SCR = USB_SCR_FLUSH_TX | USB_SCR_FLUSH_RX;
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USB->SCR = USB_SCR_FLUSH_TX | USB_SCR_FLUSH_RX;
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p.state = STATE_IDLE;
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p.state = STATE_IDLE;
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}
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}
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