mirror of
https://github.com/Polprzewodnikowy/SummerCart64.git
synced 2024-11-29 16:54:14 +01:00
endianness fix + joybus stop bit
This commit is contained in:
parent
ea42b286af
commit
281137f9f1
@ -57,7 +57,7 @@ module cpu_flashram (
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flashram.operation_pending
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flashram.operation_pending
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};
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};
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if (bus.address[7]) begin
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if (bus.address[7]) begin
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bus.rdata = flashram.rdata;
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bus.rdata = {flashram.rdata[7:0], flashram.rdata[15:8], flashram.rdata[23:16], flashram.rdata[31:24]};
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end
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end
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end
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end
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@ -41,12 +41,12 @@ module cpu_sdram (
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always_comb begin
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always_comb begin
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bus.rdata = 32'd0;
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bus.rdata = 32'd0;
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if (bus.ack) begin
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if (bus.ack) begin
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bus.rdata = rdata;
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bus.rdata = {rdata[7:0], rdata[15:8], rdata[23:16], rdata[31:24]};
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end
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end
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sdram.write = current_word ? &bus.wmask[1:0] : &bus.wmask[3:2];
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sdram.write = current_word ? &bus.wmask[1:0] : &bus.wmask[3:2];
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sdram.address = {1'b0, bus.address[30:2], current_word, 1'b0};
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sdram.address = {1'b0, bus.address[30:2], current_word, 1'b0};
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sdram.wdata = current_word ? bus.wdata[15:0] : bus.wdata[31:16];
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sdram.wdata = current_word ? {bus.wdata[23:16], bus.wdata[31:24]} : {bus.wdata[7:0], bus.wdata[15:8]};
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end
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end
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always_ff @(posedge sys.clk) begin
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always_ff @(posedge sys.clk) begin
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@ -201,14 +201,16 @@ module n64_si (
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tx_sub_bit_counter <= tx_sub_bit_counter + 1'd1;
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tx_sub_bit_counter <= tx_sub_bit_counter + 1'd1;
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if (tx_sub_bit_counter == 3'd7) begin
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if (tx_sub_bit_counter == 3'd7) begin
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tx_shift <= 1'b1;
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tx_shift <= 1'b1;
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if (tx_bit_counter > 7'd1) begin
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if (tx_bit_counter >= 7'd1) begin
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tx_bit_counter <= tx_bit_counter - 1'd1;
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tx_bit_counter <= tx_bit_counter - 1'd1;
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end else begin
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end else begin
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tx_state <= S_TX_IDLE;
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tx_state <= S_TX_IDLE;
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si.tx_busy <= 1'b0;
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si.tx_busy <= 1'b0;
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end
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end
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end
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end
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if (trx_data[80]) begin
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if (tx_bit_counter == 7'd0) begin
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si_dq_output_enable_data <= tx_sub_bit_counter < 3'd4;
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end else if (trx_data[80]) begin
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si_dq_output_enable_data <= tx_sub_bit_counter < 3'd2;
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si_dq_output_enable_data <= tx_sub_bit_counter < 3'd2;
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end else begin
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end else begin
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si_dq_output_enable_data <= tx_sub_bit_counter < 3'd6;
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si_dq_output_enable_data <= tx_sub_bit_counter < 3'd6;
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2
sw/pc/.gitignore
vendored
2
sw/pc/.gitignore
vendored
@ -5,3 +5,5 @@
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*.n64
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*.n64
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*.z64
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*.z64
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*.v64
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*.v64
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*.data
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*.bak
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@ -19,33 +19,29 @@
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#define RTC_STATUS_RUNNING (0x00)
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#define RTC_STATUS_RUNNING (0x00)
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#define RTC_STATUS(running) (running ? RTC_STATUS_RUNNING : RTC_STATUS_STOPPED)
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#define RTC_STATUS(running) (running ? RTC_STATUS_RUNNING : RTC_STATUS_STOPPED)
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#define RTC_WP_MASK (0x03)
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#define RTC_BLOCK_CFG (0)
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#define RTC_ST_MASK (0x04)
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#define RTC_BLOCK_BACKUP (1)
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#define RTC_BLOCK_TIME (2)
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#define RTC_WP_BACKUP (1 << 0)
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#define RTC_WP_TIME (1 << 1)
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#define RTC_WP_MASK (RTC_WP_TIME | RTC_WP_BACKUP)
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#define RTC_ST (1 << 2)
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#define RTC_CENTURY_20XX (0x01)
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#define RTC_CENTURY_20XX (0x01)
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static void rx (uint8_t *data) {
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static void joybus_rx (uint8_t *data) {
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uint32_t rx_length = (JOYBUS->SCR & JOYBUS_SCR_RX_LENGTH_MASK) >> JOYBUS_SCR_RX_LENGTH_BIT;
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uint32_t rx_length = (JOYBUS->SCR & JOYBUS_SCR_RX_LENGTH_MASK) >> JOYBUS_SCR_RX_LENGTH_BIT;
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for (size_t i = 0; i < rx_length; i++) {
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for (size_t i = 0; i < rx_length; i++) {
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data[i] = ((uint8_t *) JOYBUS->DATA)[(10 - rx_length) + i];
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data[i] = ((uint8_t *) JOYBUS->DATA)[(10 - rx_length) + i];
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}
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}
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}
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}
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static void tx (uint8_t *data, size_t length) {
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static void joybus_tx (uint8_t *data, size_t length) {
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for (size_t i = 0; i < ((length + 3) / 4); i++) {
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for (size_t i = 0; i < ((length + 3) / 4); i++) {
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JOYBUS->DATA[i] = ((uint32_t *) data)[i];
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JOYBUS->DATA[i] = ((uint32_t *) data)[i];
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}
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}
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JOYBUS->DATA[length / 4] |= (0x80 << ((length % 4) * 8));
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JOYBUS->SCR = ((length * 8) << JOYBUS_SCR_TX_LENGTH_BIT) | JOYBUS_SCR_TX_START;
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JOYBUS->SCR = (((length * 8) + 1) << JOYBUS_SCR_TX_LENGTH_BIT) | JOYBUS_SCR_TX_START;
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}
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static uint32_t swapb (uint32_t data) {
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return (
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(data << 24) |
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((data << 8) & 0x00FF0000) |
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((data >> 8) & 0x0000FF00) |
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(data >> 24)
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);
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}
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}
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@ -79,7 +75,7 @@ void process_joybus (void) {
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if (JOYBUS->SCR & JOYBUS_SCR_RX_READY) {
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if (JOYBUS->SCR & JOYBUS_SCR_RX_READY) {
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if (JOYBUS->SCR & JOYBUS_SCR_RX_STOP_BIT) {
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if (JOYBUS->SCR & JOYBUS_SCR_RX_STOP_BIT) {
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rx(rx_data);
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joybus_rx(rx_data);
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for (size_t i = 0; i < sizeof(tx_data); i++) {
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for (size_t i = 0; i < sizeof(tx_data); i++) {
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tx_data[i] = 0x00;
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tx_data[i] = 0x00;
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@ -90,21 +86,21 @@ void process_joybus (void) {
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switch (rx_data[0]) {
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switch (rx_data[0]) {
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case CMD_EEPROM_STATUS:
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case CMD_EEPROM_STATUS:
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tx_data[1] = p.eeprom_type == EEPROM_16K ? EEPROM_ID_16K : EEPROM_ID_4K;
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tx_data[1] = p.eeprom_type == EEPROM_16K ? EEPROM_ID_16K : EEPROM_ID_4K;
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tx(tx_data, 3);
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joybus_tx(tx_data, 3);
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break;
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break;
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case CMD_EEPROM_READ:
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case CMD_EEPROM_READ:
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data_offset = (uint32_t *) (&tx_data[0]);
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data_offset = (uint32_t *) (&tx_data[0]);
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data_offset[0] = swapb(save_data[0]);
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data_offset[0] = save_data[0];
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data_offset[1] = swapb(save_data[1]);
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data_offset[1] = save_data[1];
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tx(tx_data, 8);
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joybus_tx(tx_data, 8);
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break;
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break;
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case CMD_EEPROM_WRITE:
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case CMD_EEPROM_WRITE:
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data_offset = (uint32_t *) (&rx_data[2]);
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data_offset = (uint32_t *) (&rx_data[2]);
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save_data[0] = swapb(data_offset[0]);
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save_data[0] = data_offset[0];
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save_data[1] = swapb(data_offset[1]);
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save_data[1] = data_offset[1];
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tx(tx_data, 1);
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joybus_tx(tx_data, 1);
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break;
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break;
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}
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}
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}
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}
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@ -113,16 +109,16 @@ void process_joybus (void) {
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case CMD_RTC_STATUS:
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case CMD_RTC_STATUS:
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tx_data[1] = RTC_ID;
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tx_data[1] = RTC_ID;
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tx_data[2] = RTC_STATUS(p.rtc_running);
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tx_data[2] = RTC_STATUS(p.rtc_running);
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tx(tx_data, 3);
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joybus_tx(tx_data, 3);
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break;
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break;
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case CMD_RTC_READ:
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case CMD_RTC_READ:
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if (rx_data[1] == 0) {
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if (rx_data[1] == RTC_BLOCK_CFG) {
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tx_data[0] = p.rtc_write_protect;
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tx_data[0] = p.rtc_write_protect;
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if (!p.rtc_running) {
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if (!p.rtc_running) {
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tx_data[1] = RTC_ST_MASK;
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tx_data[1] = RTC_ST;
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}
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}
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} else if (rx_data[1] == 2) {
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} else if (rx_data[1] == RTC_BLOCK_TIME) {
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rtc_time_t *rtc_time = rtc_get_time();
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rtc_time_t *rtc_time = rtc_get_time();
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tx_data[0] = rtc_time->seconds;
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tx_data[0] = rtc_time->seconds;
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tx_data[1] = rtc_time->minutes;
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tx_data[1] = rtc_time->minutes;
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@ -134,14 +130,14 @@ void process_joybus (void) {
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tx_data[7] = RTC_CENTURY_20XX;
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tx_data[7] = RTC_CENTURY_20XX;
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}
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}
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tx_data[8] = RTC_STATUS(p.rtc_running);
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tx_data[8] = RTC_STATUS(p.rtc_running);
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tx(tx_data, 9);
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joybus_tx(tx_data, 9);
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break;
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break;
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case CMD_RTC_WRITE:
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case CMD_RTC_WRITE:
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if (rx_data[1] == 0) {
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if (rx_data[1] == RTC_BLOCK_CFG) {
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p.rtc_write_protect = rx_data[2] & RTC_WP_MASK;
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p.rtc_write_protect = rx_data[2] & RTC_WP_MASK;
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p.rtc_running = (!(rx_data[3] & RTC_ST_MASK));
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p.rtc_running = (!(rx_data[3] & RTC_ST));
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} else if (rx_data[1] == 2) {
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} else if (rx_data[1] == RTC_BLOCK_TIME && (!(p.rtc_write_protect & RTC_WP_TIME))) {
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rtc_time_t rtc_time;
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rtc_time_t rtc_time;
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rtc_time.seconds = rx_data[2];
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rtc_time.seconds = rx_data[2];
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rtc_time.minutes = rx_data[3];
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rtc_time.minutes = rx_data[3];
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@ -153,7 +149,7 @@ void process_joybus (void) {
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rtc_set_time(&rtc_time);
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rtc_set_time(&rtc_time);
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}
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}
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tx_data[0] = RTC_STATUS(p.rtc_running);
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tx_data[0] = RTC_STATUS(p.rtc_running);
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tx(tx_data, 1);
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joybus_tx(tx_data, 1);
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break;
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break;
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}
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}
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}
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}
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