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register PI reg bus
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@ -476,7 +476,11 @@ module n64_pi (
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// Reg bus controller
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logic reg_bus_address_increment;
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always_ff @(posedge clk) begin
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reg_bus_address_increment <= read_op || write_op;
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if (aleh_op) begin
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reg_bus.address[16] <= n64_pi_dq_in[0];
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end
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@ -485,15 +489,13 @@ module n64_pi (
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reg_bus.address[15:0] <= n64_pi_dq_in;
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end
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if (read_op || write_op) begin
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if (reg_bus_address_increment) begin
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reg_bus.address <= reg_bus.address + 2'd2;
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end
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end
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always_comb begin
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reg_bus.read = read_op && (read_port == PORT_REG);
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reg_bus.write = write_op && (write_port == PORT_REG);
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reg_bus.wdata = n64_pi_dq_in;
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reg_bus.read <= read_op && (read_port == PORT_REG);
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reg_bus.write <= write_op && (write_port == PORT_REG);
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reg_bus.wdata <= n64_pi_dq_in;
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end
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endmodule
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