mirror of
https://github.com/Polprzewodnikowy/SummerCart64.git
synced 2024-11-21 21:49:15 +01:00
more bug fixes and improvements
This commit is contained in:
parent
980d28d94d
commit
2dd8613794
2
build.sh
2
build.sh
@ -83,6 +83,8 @@ build_cic () {
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build_fpga () {
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if [ "$BUILT_FPGA" = true ]; then return; fi
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build_cic
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pushd fw/project/lcmxo2 > /dev/null
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if [ "$FORCE_CLEAN" = true ]; then
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rm -rf ./impl1/
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@ -305,8 +305,8 @@ void hw_spi_tx (uint8_t *data, int length) {
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}
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#define I2C_TIMEOUT_US_BUSY (1000)
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#define I2C_TIMEOUT_US_PER_BYTE (100)
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#define I2C_TIMEOUT_US_BUSY (10000)
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#define I2C_TIMEOUT_US_PER_BYTE (1000)
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static void hw_i2c_init (void) {
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RCC->APBENR1 |= RCC_APBENR1_I2C1EN;
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@ -331,18 +331,18 @@ i2c_err_t hw_i2c_trx (uint8_t address, uint8_t *tx_data, uint8_t tx_length, uint
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}
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}
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uint32_t timeout = ((tx_length + rx_length) * I2C_TIMEOUT_US_PER_BYTE);
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hw_timeout_start();
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if (tx_length > 0) {
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uint32_t tx_timeout = ((tx_length + 1) * I2C_TIMEOUT_US_PER_BYTE);
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hw_timeout_start();
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I2C1->ICR = I2C_ICR_NACKCF;
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I2C1->CR2 = (
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((rx_length > 0) ? 0 : I2C_CR2_AUTOEND) |
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(tx_length << I2C_CR2_NBYTES_Pos) |
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I2C_CR2_START |
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(address << I2C_CR2_SADD_Pos)
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);
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I2C1->CR2 |= I2C_CR2_START;
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uint8_t left = tx_length;
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@ -358,7 +358,7 @@ i2c_err_t hw_i2c_trx (uint8_t address, uint8_t *tx_data, uint8_t tx_length, uint
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return I2C_ERR_NACK;
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}
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if (hw_timeout_occured(timeout)) {
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if (hw_timeout_occured(tx_timeout)) {
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return I2C_ERR_TIMEOUT;
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}
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}
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@ -368,20 +368,24 @@ i2c_err_t hw_i2c_trx (uint8_t address, uint8_t *tx_data, uint8_t tx_length, uint
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}
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while (!(I2C1->ISR & I2C_ISR_TC)) {
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if (hw_timeout_occured(timeout)) {
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if (hw_timeout_occured(tx_timeout)) {
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return I2C_ERR_TIMEOUT;
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}
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}
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}
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if (rx_length > 0) {
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uint32_t rx_timeout = ((rx_length + 1) * I2C_TIMEOUT_US_PER_BYTE);
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hw_timeout_start();
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I2C1->CR2 = (
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I2C_CR2_AUTOEND |
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(rx_length << I2C_CR2_NBYTES_Pos) |
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I2C_CR2_START |
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I2C_CR2_RD_WRN |
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(address << I2C_CR2_SADD_Pos)
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);
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I2C1->CR2 |= I2C_CR2_START;
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uint8_t left = rx_length;
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@ -393,7 +397,7 @@ i2c_err_t hw_i2c_trx (uint8_t address, uint8_t *tx_data, uint8_t tx_length, uint
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left -= 1;
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}
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if (hw_timeout_occured(timeout)) {
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if (hw_timeout_occured(rx_timeout)) {
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return I2C_ERR_TIMEOUT;
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}
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}
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@ -121,20 +121,26 @@ static void lcmxo2_reset_bus (void) {
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#endif
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}
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static void lcmxo2_execute_cmd (uint8_t cmd, uint32_t arg, cmd_type_t type, uint8_t *buffer, uint8_t length, bool write) {
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static bool lcmxo2_execute_cmd (uint8_t cmd, uint32_t arg, cmd_type_t type, uint8_t *buffer, uint8_t length, bool write) {
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#ifdef LCMXO2_I2C
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uint8_t packet[20] = { cmd, ((arg >> 16) & 0xFF), ((arg >> 8) & 0xFF), (arg & 0xFF) };
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int packet_length = ((type == CMD_TWO_OP) ? 3 : 4);
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if (write) {
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for (int i = 0; i < length; i++) {
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packet[packet_length + i] = buffer[i];
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}
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packet_length += length;
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}
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hw_i2c_trx(LCMXO2_I2C_ADDR_CFG, packet, packet_length, buffer, (write ? 0 : length));
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i2c_err_t err = hw_i2c_trx(LCMXO2_I2C_ADDR_CFG, packet, packet_length, buffer, (write ? 0 : length));
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return (err != I2C_OK);
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#else
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uint32_t data = (cmd << 24) | (arg & 0x00FFFFFF);
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lcmxo2_reg_set(LCMXO2_CFGCR, CFGCR_WBCE);
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uint32_t data = (cmd << 24) | (arg & 0x00FFFFFF);
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fpga_reg_set(REG_VENDOR_DATA, data);
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fpga_reg_set(REG_VENDOR_SCR,
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(LCMXO2_CFGTXDR << VENDOR_SCR_ADDRESS_BIT) |
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@ -143,7 +149,9 @@ static void lcmxo2_execute_cmd (uint8_t cmd, uint32_t arg, cmd_type_t type, uint
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VENDOR_SCR_WRITE |
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VENDOR_SCR_START
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);
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while (fpga_reg_get(REG_VENDOR_SCR) & VENDOR_SCR_BUSY);
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if (length > 0) {
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if (write) {
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lcmxo2_write_data(buffer, length);
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@ -151,82 +159,105 @@ static void lcmxo2_execute_cmd (uint8_t cmd, uint32_t arg, cmd_type_t type, uint
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lcmxo2_read_data(buffer, length);
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}
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}
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lcmxo2_reg_set(LCMXO2_CFGCR, 0);
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return false;
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#endif
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}
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static void lcmxo2_read_device_id (uint8_t *id) {
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lcmxo2_execute_cmd(IDCODE_PUB, 0, CMD_NORMAL, id, DEVICE_ID_SIZE, false);
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static bool lcmxo2_read_device_id (uint8_t *id) {
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return lcmxo2_execute_cmd(IDCODE_PUB, 0, CMD_NORMAL, id, DEVICE_ID_SIZE, false);
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}
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static uint32_t lcmxo2_read_status (void) {
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uint32_t status = 0;
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lcmxo2_execute_cmd(LSC_READ_STATUS, 0, CMD_NORMAL, (uint8_t *) (&status), 4, false);
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return SWAP32(status);
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static uint32_t lcmxo2_read_status (uint32_t *status) {
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uint32_t tmp = 0;
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bool error = lcmxo2_execute_cmd(LSC_READ_STATUS, 0, CMD_NORMAL, (uint8_t *) (&tmp), 4, false);
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*status = SWAP32(tmp);
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return error;
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}
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static bool lcmxo2_wait_busy (void) {
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bool error;
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uint32_t status;
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do {
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status = lcmxo2_read_status();
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} while (status & LSC_STATUS_BUSY);
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return (status & LSC_STATUS_FAIL);
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error = lcmxo2_read_status(&status);
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} while ((!error) && (status & LSC_STATUS_BUSY));
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return (error) || (status & LSC_STATUS_FAIL);
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}
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static bool lcmxo2_enable_flash (void) {
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#ifdef LCMXO2_I2C
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lcmxo2_execute_cmd(ISC_ENABLE, 0x080000, CMD_TWO_OP, NULL, 0, false);
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if (lcmxo2_execute_cmd(ISC_ENABLE, 0x080000, CMD_TWO_OP, NULL, 0, false)) {
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return true;
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}
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#else
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lcmxo2_execute_cmd(ISC_ENABLE_X, 0x080000, CMD_NORMAL, NULL, 0, false);
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if (lcmxo2_execute_cmd(ISC_ENABLE_X, 0x080000, CMD_NORMAL, NULL, 0, false)) {
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return true;
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}
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#endif
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return lcmxo2_wait_busy();
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}
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static void lcmxo2_disable_flash (void) {
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lcmxo2_wait_busy();
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lcmxo2_execute_cmd(ISC_DISABLE, 0, CMD_TWO_OP, NULL, 0, false);
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lcmxo2_execute_cmd(ISC_NOOP, 0xFFFFFF, CMD_NORMAL, NULL, 0, false);
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static bool lcmxo2_disable_flash (void) {
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if (lcmxo2_wait_busy()) {
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return true;
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}
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if (lcmxo2_execute_cmd(ISC_DISABLE, 0, CMD_TWO_OP, NULL, 0, false)) {
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return true;
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}
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return lcmxo2_execute_cmd(ISC_NOOP, 0xFFFFFF, CMD_NORMAL, NULL, 0, false);
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}
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static bool lcmxo2_erase_featbits (void) {
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lcmxo2_execute_cmd(ISC_ERASE, ISC_ERASE_FEATURE, CMD_NORMAL, NULL, 0, false);
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if (lcmxo2_execute_cmd(ISC_ERASE, ISC_ERASE_FEATURE, CMD_NORMAL, NULL, 0, false)) {
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return true;
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}
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return lcmxo2_wait_busy();
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}
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static bool lcmxo2_erase_flash (void) {
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lcmxo2_execute_cmd(ISC_ERASE, (ISC_ERASE_UFM | ISC_ERASE_CFG), CMD_NORMAL, NULL, 0, false);
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if (lcmxo2_execute_cmd(ISC_ERASE, (ISC_ERASE_UFM | ISC_ERASE_CFG), CMD_NORMAL, NULL, 0, false)) {
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return true;
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}
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return lcmxo2_wait_busy();
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}
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static void lcmxo2_reset_flash_address (void) {
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lcmxo2_execute_cmd(LSC_INIT_ADDRESS, 0, CMD_NORMAL, NULL, 0, false);
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static bool lcmxo2_reset_flash_address (void) {
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return lcmxo2_execute_cmd(LSC_INIT_ADDRESS, 0, CMD_NORMAL, NULL, 0, false);
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}
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static bool lcmxo2_write_flash_page (uint8_t *buffer) {
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lcmxo2_execute_cmd(LSC_PROG_INCR_NV, 1, CMD_NORMAL, buffer, FLASH_PAGE_SIZE, true);
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if (lcmxo2_execute_cmd(LSC_PROG_INCR_NV, 1, CMD_NORMAL, buffer, FLASH_PAGE_SIZE, true)) {
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return true;
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}
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return lcmxo2_wait_busy();
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}
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static void lcmxo2_read_flash_page (uint8_t *buffer) {
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lcmxo2_execute_cmd(LSC_READ_INCR_NV, 1, CMD_DELAYED, buffer, FLASH_PAGE_SIZE, false);
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static bool lcmxo2_read_flash_page (uint8_t *buffer) {
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return lcmxo2_execute_cmd(LSC_READ_INCR_NV, 1, CMD_DELAYED, buffer, FLASH_PAGE_SIZE, false);
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}
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static bool lcmxo2_program_done (void) {
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lcmxo2_execute_cmd(ISC_PROGRAM_DONE, 0, CMD_NORMAL, NULL, 0, false);
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if (lcmxo2_execute_cmd(ISC_PROGRAM_DONE, 0, CMD_NORMAL, NULL, 0, false)) {
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return true;
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}
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return lcmxo2_wait_busy();
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}
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static bool lcmxo2_write_featbits (uint8_t *buffer) {
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lcmxo2_execute_cmd(LSC_PROG_FEABITS, 0, CMD_NORMAL, buffer, FEATBITS_SIZE, true);
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if (lcmxo2_execute_cmd(LSC_PROG_FEABITS, 0, CMD_NORMAL, buffer, FEATBITS_SIZE, true)) {
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return true;
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}
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return lcmxo2_wait_busy();
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}
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static void lcmxo2_read_featbits (uint8_t *buffer) {
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lcmxo2_execute_cmd(LSC_READ_FEABITS, 0, CMD_NORMAL, buffer, FEATBITS_SIZE, false);
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static bool lcmxo2_read_featbits (uint8_t *buffer) {
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return lcmxo2_execute_cmd(LSC_READ_FEABITS, 0, CMD_NORMAL, buffer, FEATBITS_SIZE, false);
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}
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static void lcmxo2_refresh (void) {
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lcmxo2_execute_cmd(LSC_REFRESH, 0, CMD_TWO_OP, NULL, 0, false);
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static bool lcmxo2_refresh (void) {
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return lcmxo2_execute_cmd(LSC_REFRESH, 0, CMD_TWO_OP, NULL, 0, false);
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}
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static vendor_error_t lcmxo2_fail (vendor_error_t error) {
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@ -346,20 +377,29 @@ static bool primer_check_rx_length (primer_cmd_e cmd, size_t rx_length) {
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static bool lcmxo2_init_featbits (void) {
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uint8_t programmed[2] = { 0x00, 0x00 };
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uint8_t target[2] = { FEATBITS_0_SPI_OFF, FEATBITS_1_PROGRAMN_OFF };
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lcmxo2_read_featbits(programmed);
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if (lcmxo2_read_featbits(programmed)) {
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return true;
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}
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if ((programmed[0] == target[0]) && (programmed[1] == target[1])) {
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return false;
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}
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if (lcmxo2_erase_featbits()) {
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return true;
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}
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if (lcmxo2_write_featbits(target)) {
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return true;
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}
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lcmxo2_read_featbits(programmed);
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if (lcmxo2_read_featbits(programmed)) {
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return true;
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}
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if ((programmed[0] != target[0]) || (programmed[1] != target[1])) {
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return true;
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}
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return false;
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}
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@ -403,7 +443,7 @@ void vendor_initial_configuration (vendor_get_cmd_t get_cmd, vendor_send_respons
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break;
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case CMD_GET_DEVICE_ID:
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lcmxo2_read_device_id(buffer);
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error = lcmxo2_read_device_id(buffer);
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tx_length = 4;
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break;
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@ -416,7 +456,7 @@ void vendor_initial_configuration (vendor_get_cmd_t get_cmd, vendor_send_respons
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break;
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case CMD_RESET_ADDRESS:
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lcmxo2_reset_flash_address();
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error = lcmxo2_reset_flash_address();
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break;
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case CMD_WRITE_PAGE:
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@ -424,7 +464,7 @@ void vendor_initial_configuration (vendor_get_cmd_t get_cmd, vendor_send_respons
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break;
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case CMD_READ_PAGE:
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lcmxo2_read_flash_page(buffer);
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error = lcmxo2_read_flash_page(buffer);
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tx_length = FLASH_PAGE_SIZE;
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break;
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@ -437,7 +477,7 @@ void vendor_initial_configuration (vendor_get_cmd_t get_cmd, vendor_send_respons
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break;
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case CMD_REFRESH:
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lcmxo2_refresh();
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error = lcmxo2_refresh();
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hw_delay_ms(200);
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break;
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@ -204,9 +204,16 @@ class STM32Bootloader:
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__connected = False
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def __init__(self, write: Callable[[bytes], None], read: Callable[[int], bytes], progress: Callable[[int, int, str], None]):
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def __init__(
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self,
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write: Callable[[bytes], None],
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read: Callable[[int], bytes],
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flush: Callable[[None], None],
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progress: Callable[[int, int, str], None]
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):
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self.__write = write
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self.__read = read
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self.__flush = flush
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self.__progress = progress
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def __append_xor(self, data: bytes) -> bytes:
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@ -217,7 +224,7 @@ class STM32Bootloader:
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def __check_ack(self) -> None:
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response = self.__read(1)
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if (response == None):
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if (len(response) != 1):
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raise STM32BootloaderException('No ACK/NACK byte received')
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if (response == self.__NACK):
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raise STM32BootloaderException('NACK byte received')
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@ -228,18 +235,22 @@ class STM32Bootloader:
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if (len(cmd) != 1):
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raise ValueError('Command must contain only one byte')
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self.__write(self.__append_xor(cmd))
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self.__flush()
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self.__check_ack()
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def __data_write(self, data: bytes) -> None:
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self.__write(self.__append_xor(data))
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self.__flush()
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self.__check_ack()
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def __data_read(self) -> bytes:
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length = self.__read(1)
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if (len(length) != 1):
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raise STM32BootloaderException('Did not receive length byte')
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length = length[0]
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data = self.__read(length + 1)
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length = (length[0] + 1)
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data = self.__read(length)
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if (len(data) != length):
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raise STM32BootloaderException('Did not receive requested data bytes')
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self.__check_ack()
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return data
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@ -253,7 +264,10 @@ class STM32Bootloader:
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self.__cmd_send(b'\x11')
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self.__data_write(address.to_bytes(4, byteorder='big'))
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self.__data_write(bytes([length - 1]))
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return self.__read(length)
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data = self.__read(length)
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if (len(data) != length):
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raise STM32BootloaderException(f'Did not receive requested memory bytes')
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return data
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def __go(self, address: int) -> None:
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self.__cmd_send(b'\x21')
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@ -288,8 +302,12 @@ class STM32Bootloader:
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def connect(self, id: int) -> None:
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if (not self.__connected):
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self.__write(self.__INIT)
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self.__check_ack()
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try:
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self.__write(self.__INIT)
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self.__flush()
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self.__check_ack()
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except STM32BootloaderException as e:
|
||||
raise STM32BootloaderException(f'Could not connect to the STM32 ({e})')
|
||||
self.__connected = True
|
||||
dev_id = self.__get_id()
|
||||
if (dev_id != id):
|
||||
@ -339,9 +357,16 @@ class LCMXO2Primer:
|
||||
|
||||
DEV_ID_LCMXO2_7000HC = b'\x01\x2B\xD0\x43'
|
||||
|
||||
def __init__(self, write: Callable[[bytes], None], read: Callable[[int], bytes], progress: Callable[[int, int, str], None]):
|
||||
def __init__(
|
||||
self,
|
||||
write: Callable[[bytes], None],
|
||||
read: Callable[[int], bytes],
|
||||
flush: Callable[[None], None],
|
||||
progress: Callable[[int, int, str], None]
|
||||
):
|
||||
self.__write = write
|
||||
self.__read = read
|
||||
self.__flush = flush
|
||||
self.__progress = progress
|
||||
|
||||
def __cmd_execute(self, cmd: bytes, data: bytes=b'') -> bytes:
|
||||
@ -355,14 +380,20 @@ class LCMXO2Primer:
|
||||
packet += data
|
||||
packet += crc32(packet).to_bytes(4, byteorder='little')
|
||||
self.__write(packet)
|
||||
self.__flush()
|
||||
|
||||
response = self.__read(5)
|
||||
if (len(response) != 5):
|
||||
raise LCMXO2PrimerException(f'No response received [{cmd}]')
|
||||
length = int.from_bytes(response[4:5], byteorder='little')
|
||||
response += self.__read(length)
|
||||
calculated_checksum = crc32(response)
|
||||
received_checksum = int.from_bytes(self.__read(4), byteorder='little')
|
||||
response_data = self.__read(length)
|
||||
if (len(response_data) != length):
|
||||
raise LCMXO2PrimerException(f'No response data received [{cmd}]')
|
||||
checksum = self.__read(4)
|
||||
if (len(checksum) != 4):
|
||||
raise LCMXO2PrimerException(f'No response data checksum received [{cmd}]')
|
||||
calculated_checksum = crc32(response + response_data)
|
||||
received_checksum = int.from_bytes(checksum, byteorder='little')
|
||||
|
||||
if (response[0:3] != b'RSP'):
|
||||
raise LCMXO2PrimerException(f'Invalid response token [{response[0:3]} / {cmd}]')
|
||||
@ -371,16 +402,19 @@ class LCMXO2Primer:
|
||||
if (calculated_checksum != received_checksum):
|
||||
raise LCMXO2PrimerException(f'Invalid response checksum [{cmd}]')
|
||||
|
||||
return response[5:]
|
||||
return response_data
|
||||
|
||||
def connect(self, id: bytes) -> None:
|
||||
primer_id = self.__cmd_execute(self.__CMD_GET_PRIMER_ID)
|
||||
if (primer_id != self.__PRIMER_ID_LCMXO2):
|
||||
raise LCMXO2PrimerException('Invalid primer ID received')
|
||||
try:
|
||||
primer_id = self.__cmd_execute(self.__CMD_GET_PRIMER_ID)
|
||||
if (primer_id != self.__PRIMER_ID_LCMXO2):
|
||||
raise LCMXO2PrimerException('Invalid primer ID received')
|
||||
|
||||
dev_id = self.__cmd_execute(self.__CMD_GET_DEVICE_ID)
|
||||
if (dev_id != id):
|
||||
raise LCMXO2PrimerException('Invalid FPGA device id received')
|
||||
dev_id = self.__cmd_execute(self.__CMD_GET_DEVICE_ID)
|
||||
if (dev_id != id):
|
||||
raise LCMXO2PrimerException('Invalid FPGA device id received')
|
||||
except LCMXO2PrimerException as e:
|
||||
raise LCMXO2PrimerException(f'Could not connect to the LCMXO2 primer ({e})')
|
||||
|
||||
def load_flash_and_run(self, data: bytes, description: str) -> None:
|
||||
erase_description = f'{description} / Erase'
|
||||
@ -599,8 +633,8 @@ class SC64BringUp:
|
||||
write_timeout=self.__SERIAL_TIMEOUT
|
||||
)
|
||||
|
||||
stm32_bootloader = STM32Bootloader(link.write, link.read, self.__progress)
|
||||
lcmxo2_primer = LCMXO2Primer(link.write, link.read, self.__progress)
|
||||
stm32_bootloader = STM32Bootloader(link.write, link.read, link.flush, self.__progress)
|
||||
lcmxo2_primer = LCMXO2Primer(link.write, link.read, link.flush, self.__progress)
|
||||
|
||||
stm32_bootloader.connect(stm32_bootloader.DEV_ID_STM32G030XX)
|
||||
stm32_bootloader.load_ram_and_run(self.__sc64_update_data.get_primer_data(), 'FPGA primer -> STM32 RAM')
|
||||
@ -645,7 +679,7 @@ if __name__ == '__main__':
|
||||
sc64_bring_up = SC64BringUp(progress=utils.progress)
|
||||
|
||||
Utils.log()
|
||||
Utils.info('[ Welcome to SC64 flashcart board bring-up! ]')
|
||||
Utils.info('[ Welcome to SummerCart64 flashcart board bring-up! ]')
|
||||
Utils.log()
|
||||
|
||||
Utils.log(f'Serial port: {port}')
|
||||
@ -683,6 +717,7 @@ if __name__ == '__main__':
|
||||
original_sigint_handler = signal.getsignal(signal.SIGINT)
|
||||
try:
|
||||
signal.signal(signal.SIGINT, lambda *kwargs: utils.exit_warning())
|
||||
Utils.log('Starting SC64 flashcart board bring-up...')
|
||||
sc64_bring_up.start_bring_up(port, bootloader_only)
|
||||
except (serial.SerialException, STM32BootloaderException, LCMXO2PrimerException, SC64Exception) as e:
|
||||
if (utils.get_progress_active):
|
||||
|
Loading…
Reference in New Issue
Block a user