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reset state inside controller

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Polprzewodnikowy 2022-09-28 20:46:57 +02:00
parent 2052c9b977
commit 2e4fd2b200
7 changed files with 55 additions and 24 deletions
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3
fw/rtl/n64/n64_cfg.sv
View File

@ -64,7 +64,8 @@ module n64_cfg (
n64_scb.cfg_unlock <= 1'b1;
end
if (reset || n64_scb.n64_reset) begin
if (reset || n64_scb.n64_reset || n64_scb.n64_nmi) begin
n64_scb.cfg_unlock <= 1'b0;
n64_scb.cfg_pending <= 1'b0;
n64_scb.cfg_cmd <= 8'h00;
irq <= 1'b0;

24
sw/controller/src/cfg.c
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@ -306,7 +306,6 @@ bool cfg_update (uint32_t *args) {
break;
case CFG_ID_BUTTON_STATE:
return true;
break;
case CFG_ID_BUTTON_MODE:
button_set_mode(args[1]);
break;
@ -342,13 +341,30 @@ void cfg_set_time (uint32_t *args) {
rtc_set_time(&t);
}
void cfg_init (void) {
fpga_reg_set(REG_CFG_SCR, CFG_SCR_BOOTLOADER_ENABLED);
void cfg_reset (void) {
uint32_t mask = (
CFG_SCR_BOOTLOADER_SKIP |
CFG_SCR_ROM_WRITE_ENABLED |
CFG_SCR_ROM_SHADOW_ENABLED |
CFG_SCR_DD_ENABLED |
CFG_SCR_DDIPL_ENABLED |
CFG_SCR_ROM_EXTENDED_ENABLED
);
cfg_change_scr_bits(mask, false);
cfg_set_save_type(SAVE_TYPE_NONE);
button_set_mode(BUTTON_MODE_NONE);
dd_set_drive_type(DD_DRIVE_TYPE_RETAIL);
dd_set_disk_state(DD_DISK_STATE_EJECTED);
dd_set_sd_mode(false);
isv_set_enabled(false);
p.cic_seed = CIC_SEED_UNKNOWN;
p.tv_type = TV_TYPE_UNKNOWN;
p.boot_mode = BOOT_MODE_MENU;
}
void cfg_init (void) {
fpga_reg_set(REG_CFG_SCR, CFG_SCR_BOOTLOADER_ENABLED);
cfg_reset();
p.usb_output_ready = true;
}

1
sw/controller/src/cfg.h
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@ -11,6 +11,7 @@ bool cfg_query (uint32_t *args);
bool cfg_update (uint32_t *args);
void cfg_get_time (uint32_t *args);
void cfg_set_time (uint32_t *args);
void cfg_reset (void);
void cfg_init (void);
void cfg_process (void);

22
sw/controller/src/cic.c
View File

@ -21,6 +21,7 @@ static volatile bool cic_detect_enabled;
static volatile uint8_t cic_next_rd;
static volatile uint8_t cic_next_wr;
static volatile bool cic_disabled = false;
static volatile bool cic_dd_mode = false;
static volatile uint8_t cic_seed = 0x3F;
static volatile uint8_t cic_checksum[6] = { 0xA5, 0x36, 0xC0, 0xF1, 0xD8, 0x59 };
@ -44,8 +45,10 @@ static void cic_irq_reset_falling (void) {
}
static void cic_irq_reset_rising (void) {
cic_enabled = true;
task_set_ready_and_reset(TASK_ID_CIC);
if (!cic_disabled) {
cic_enabled = true;
task_set_ready_and_reset(TASK_ID_CIC);
}
}
static void cic_irq_clk_falling (void) {
@ -296,8 +299,21 @@ static void cic_soft_reset (void) {
}
void cic_reset_parameters (void) {
cic_disabled = false;
cic_dd_mode = false;
cic_seed = 0x3F;
cic_checksum[0] = 0xA5;
cic_checksum[1] = 0x36;
cic_checksum[2] = 0xC0;
cic_checksum[3] = 0xF1;
cic_checksum[4] = 0xD8;
cic_checksum[5] = 0x59;
}
void cic_set_parameters (uint32_t *args) {
cic_dd_mode = (args[0] >> 24) & 0x01;
cic_disabled = (args[0 >> 24]) & (1 << 1);
cic_dd_mode = (args[0] >> 24) & (1 << 0);
cic_seed = (args[0] >> 16) & 0xFF;
cic_checksum[0] = (args[0] >> 8) & 0xFF;
cic_checksum[1] = args[0] & 0xFF;

1
sw/controller/src/cic.h
View File

@ -5,6 +5,7 @@
#include <stdint.h>
void cic_reset_parameters (void);
void cic_set_parameters (uint32_t *args);
void cic_hw_init (void);
void cic_task (void);

7
sw/controller/src/usb.c
View File

@ -161,6 +161,13 @@ static void usb_rx_process (void) {
p.response_info.data[0] = cfg_get_version();
break;
case 'R':
cfg_reset();
cic_reset_parameters();
p.rx_state = RX_STATE_IDLE;
p.response_pending = true;
break;
case 'B':
cic_set_parameters(p.rx_args);
p.rx_state = RX_STATE_IDLE;

21
sw/pc/sc64.py
View File

@ -362,20 +362,7 @@ class SC64:
raise ConnectionException('Flash memory program failure')
def reset_state(self) -> None:
self.__set_config(self.__CfgId.ROM_WRITE_ENABLE, False)
self.__set_config(self.__CfgId.ROM_SHADOW_ENABLE, False)
self.__set_config(self.__CfgId.DD_MODE, self.__DDMode.NONE)
self.__set_config(self.__CfgId.ISV_ENABLE, False)
self.__set_config(self.__CfgId.BOOT_MODE, self.BootMode.MENU)
self.__set_config(self.__CfgId.SAVE_TYPE, self.SaveType.NONE)
self.__set_config(self.__CfgId.CIC_SEED, self.CICSeed.AUTO)
self.__set_config(self.__CfgId.TV_TYPE, self.TVType.AUTO)
self.__set_config(self.__CfgId.DD_DRIVE_TYPE, self.__DDDriveType.RETAIL)
self.__set_config(self.__CfgId.DD_DISK_STATE, self.__DDDiskState.EJECTED)
self.__set_config(self.__CfgId.BUTTON_MODE, self.__ButtonMode.NONE)
self.__set_config(self.__CfgId.ROM_EXTENDED_ENABLE, False)
self.__set_config(self.__CfgId.DD_SD_MODE, False)
self.set_cic_parameters()
self.__link.execute_cmd(cmd=b'R')
def get_state(self):
return {
@ -483,12 +470,14 @@ class SC64:
def set_save_type(self, type: SaveType) -> None:
self.__set_config(self.__CfgId.SAVE_TYPE, type)
def set_cic_parameters(self, dd_mode: bool=False, seed: int=0x3F, checksum: bytes=bytes([0xA5, 0x36, 0xC0, 0xF1, 0xD8, 0x59])) -> None:
def set_cic_parameters(self, disabled=False, dd_mode: bool=False, seed: int=0x3F, checksum: bytes=bytes([0xA5, 0x36, 0xC0, 0xF1, 0xD8, 0x59])) -> None:
if (seed < 0 or seed > 0xFF):
raise ValueError('CIC seed outside of allowed values')
if (len(checksum) != 6):
raise ValueError('CIC checksum length outside of allowed values')
data = bytes([1 if dd_mode else 0, seed])
mode = (1 << 1) if disabled else 0
mode |= (1 << 0) if dd_mode else 0
data = bytes([mode, seed])
data = [*data, *checksum]
self.__link.execute_cmd(cmd=b'B', args=[self.__get_int(data[0:4]), self.__get_int(data[4:8])])