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https://github.com/Polprzewodnikowy/SummerCart64.git
synced 2024-11-28 00:14:14 +01:00
minor bootloader tweaks
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@ -81,9 +81,10 @@ $(BUILD_DIR)/bootloader.elf: $(OBJS) N64.ld
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@$(OBJDUMP) -S $@ > $(BUILD_DIR)/bootloader.lst
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$(BUILD_DIR)/bootloader.bin: $(BUILD_DIR)/bootloader.elf
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@$(STRIP) -s $<
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@$(N64_ELFCOMPRESS) -c 2 -o $(dir $<) $<
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@$(N64_TOOL) --title "SC64 bootloader" --output $@ --align 256 $<
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@cp $< $<.stripped
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@$(STRIP) -s $<.stripped
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@$(N64_ELFCOMPRESS) -c 2 -o $(dir $<) $<.stripped
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@$(N64_TOOL) --title "SC64 bootloader" --output $@ --align 256 $<.stripped
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all: $(BUILD_DIR)/bootloader.bin
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@ -1,6 +1,7 @@
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MEMORY {
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exception (rx) : org = 0x80000000, len = 0x400
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ram (rwx) : org = 0x80000400, len = 1M
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framebuffer (rw) : org = 0x8026A000, len = 600k
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framebuffer (rw) : org = 0x8016A000, len = 600k
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}
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ENTRY(entry_handler)
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@ -9,6 +10,10 @@ __exception_stack_size = 8k;
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__stack_size = 16k;
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SECTIONS {
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.exception : {
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KEEP(*(.text.exception_vector));
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} > exception
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.text : SUBALIGN(8) {
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*(.text.entry_handler)
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*(.text .text.* .gnu.linkonce.t.*)
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@ -3,10 +3,6 @@
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#define WATCHDOG_TIMEOUT (5 * (93750000UL / 2))
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#define VECTOR_LOCATION (0xA0000000UL)
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#define VECTOR_SIZE (0x80)
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#define VECTOR_NUM (4)
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#define ZR_OFFSET (0)
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#define AT_OFFSET (8)
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#define V0_OFFSET (16)
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@ -46,8 +42,23 @@
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#define SAVE_REGISTERS_SIZE (280)
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.section .text.exception_vector
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exception_tlb_miss:
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.org 0x0000
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j exception_handler
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exception_xtlb_miss:
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.org 0x0080
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j exception_handler
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exception_other:
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.org 0x0180
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j exception_handler
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.section .text.exception_handler
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exception_handler:
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.type exception_handler, %function
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.set noat
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la $k0, (_esp - SAVE_REGISTERS_SIZE)
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sd $zero, ZR_OFFSET($k0)
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@ -153,48 +164,9 @@ exception_restore:
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eret
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.section .text.exception_vector
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exception_vector:
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.set noreorder
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la $k0, exception_handler
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jalr $k1, $k0
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nop
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.equ exception_vector_size, (. - exception_vector)
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.set reorder
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.section .text.exception_install
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exception_install:
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.global exception_install
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la $t0, exception_vector
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li $t1, VECTOR_LOCATION
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li $t2, (VECTOR_SIZE * VECTOR_NUM)
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add $t2, $t2, $t1
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1:
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move $t3, $t0
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move $t4, $t1
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li $t5, exception_vector_size
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add $t5, $t5, $t4
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2:
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lw $t6, 0($t3)
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addiu $t3, 4
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sw $t6, 0($t4)
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addiu $t4, 4
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bne $t4, $t5, 2b
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addiu $t1, VECTOR_SIZE
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bne $t1, $t2, 1b
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li $t0, VECTOR_LOCATION
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li $t1, (VECTOR_SIZE * VECTOR_NUM)
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add $t1, $t0, $t1
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3:
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cache HIT_INVALIDATE_I, 0($t0)
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addiu $t0, CACHE_LINE_SIZE_I
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bne $t0, $t1, 3b
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jr $ra
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.section .text.exception_enable_interrupts
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exception_enable_interrupts:
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.type exception_enable_interrupts, %function
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.global exception_enable_interrupts
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mfc0 $t0, C0_STATUS
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li $t1, C0_SR_IE
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@ -205,6 +177,7 @@ exception_enable_interrupts:
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.section .text.exception_disable_interrupts
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exception_disable_interrupts:
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.type exception_disable_interrupts, %function
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.global exception_disable_interrupts
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mfc0 $t0, C0_STATUS
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li $t1, ~(C0_SR_IE)
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@ -215,6 +188,7 @@ exception_disable_interrupts:
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.section .text.exception_enable_watchdog
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exception_enable_watchdog:
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.type exception_enable_watchdog, %function
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.global exception_enable_watchdog
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mtc0 $zero, C0_COUNT
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li $t1, WATCHDOG_TIMEOUT
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@ -228,6 +202,7 @@ exception_enable_watchdog:
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.section .text.exception_disable_watchdog
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exception_disable_watchdog:
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.type exception_disable_watchdog, %function
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.global exception_disable_watchdog
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mfc0 $t0, C0_STATUS
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li $t1, ~(C0_SR_IM7)
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@ -7,7 +7,6 @@
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#define EXCEPTION_TRIGGER(code) { asm volatile ("syscall %[c]\n" :: [c] "i" (code)); }
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void exception_install (void);
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void exception_enable_interrupts (void);
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void exception_disable_interrupts (void);
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void exception_enable_watchdog (void);
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@ -16,8 +16,6 @@ void init (init_tv_type_t tv_type, init_reset_type_t reset_type) {
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__tv_type = tv_type;
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__reset_type = reset_type;
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exception_install();
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sc64_unlock();
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if (!sc64_check_presence()) {
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