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https://github.com/Polprzewodnikowy/SummerCart64.git
synced 2025-01-09 11:09:22 +01:00
fw irq improvements (force high state for one clock when de-asserting irq)
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@ -138,7 +138,12 @@ module n64_cfg (
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lock_sequence_counter <= 1'd0;
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lock_sequence_counter <= 1'd0;
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end
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end
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if (lock_sequence_counter == 1'd1) begin
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if (lock_sequence_counter == 1'd1) begin
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n64_scb.cfg_unlock <= (reg_bus.wdata != 16'hFFFF);
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if (reg_bus.wdata == 16'hFFFF) begin
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n64_scb.cfg_unlock <= 1'b0;
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cmd_irq_request <= 1'b0;
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cmd_irq <= 1'b0;
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mcu_irq <= 1'b0;
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end
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end
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end
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end
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end
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@ -26,13 +26,19 @@ module n64_top (
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logic n64_dd_irq;
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logic n64_dd_irq;
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logic n64_cfg_irq;
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logic n64_cfg_irq;
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logic n64_irq_oe;
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logic irq_data;
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logic irq_dq;
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logic [1:0] irq_oe;
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assign irq_data = (n64_dd_irq || n64_cfg_irq);
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always @(posedge clk) begin
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always @(posedge clk) begin
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n64_irq_oe <= (n64_dd_irq || n64_cfg_irq);
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irq_dq <= (~irq_data);
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irq_oe <= {irq_oe[0], irq_data};
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end
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end
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assign n64_irq = n64_irq_oe ? 1'b0 : 1'bZ;
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assign n64_irq = irq_oe[1] ? irq_dq : 1'bZ;
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n64_reg_bus reg_bus ();
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n64_reg_bus reg_bus ();
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