mirror of
https://github.com/Polprzewodnikowy/SummerCart64.git
synced 2024-11-21 21:49:15 +01:00
sc64.py is gone
This commit is contained in:
parent
e67c74f66c
commit
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13
build.sh
13
build.sh
@ -5,16 +5,15 @@ set -e
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PACKAGE_FILE_NAME="sc64-extra"
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TOP_FILES=(
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"./sw/pc/primer.py"
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"./sw/pc/requirements.txt"
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"./sw/pc/sc64.py"
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"./sw/update/sc64-firmware.bin"
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"./fw/ftdi/ft232h_config.xml"
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"./sw/tools/primer.py"
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"./sw/tools/requirements.txt"
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"./sw/tools/sc64-firmware.bin"
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)
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FILES=(
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"./assets/*"
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"./docs/*"
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"./fw/ftdi/ft232h_config.xml"
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"./hw/pcb/sc64_hw_v2.0a_bom.html"
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"./hw/pcb/sc64v2.kicad_pcb"
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"./hw/pcb/sc64v2.kicad_pro"
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@ -84,7 +83,7 @@ build_update () {
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build_controller
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build_fpga
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pushd sw/update > /dev/null
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pushd sw/tools > /dev/null
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if [ "$FORCE_CLEAN" = true ]; then
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rm -f ./sc64-firmware.bin
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fi
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@ -117,7 +116,7 @@ build_release () {
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zip -j -r $PACKAGE ${TOP_FILES[@]}
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zip -r $PACKAGE ${FILES[@]}
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cp sw/update/sc64-firmware.bin ./sc64-firmware${SC64_VERSION}.bin
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cp sw/tools/sc64-firmware.bin ./sc64-firmware${SC64_VERSION}.bin
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BUILT_RELEASE=true
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}
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@ -11,7 +11,8 @@
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## Step by step guide how to make SC64
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All necessary manufacturing files are packaged in every `sc64-extra-{version}.zip` file in GitHub releases. Please download latest release before proceeding with the instructions.
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All necessary manufacturing files are packaged in every `sc64-extra-{version}.zip` file in GitHub releases.
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Please download latest release before proceeding with the instructions.
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---
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@ -45,13 +46,16 @@ All necessary manufacturing files are packaged in every `sc64-extra-{version}.zi
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1. Locate `.stl` files inside `hw/shell` folder
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2. Use these files in the slicer and 3D printer of your choice or order ready made prints from 3D printing company
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3. Find matching screws, dimensions are the same as on retail N64 cartridges
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3. Find matching screws, go to discussions tab for community recommendations
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---
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### **Putting it together**
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There are no special requirements for soldering components to board. All chips and connectors can be soldered with standard manual soldering iron, although hot air station is recommended. Interactive BOM has every component and its value highlighted on PCB drawings and it's strongly recommended to use during assembly process. You can skip this step if PCB assembly service was used in previous steps.
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There are no special requirements for soldering components to board.
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All chips and connectors can be soldered with standard manual soldering iron, although hot air station is recommended.
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Interactive BOM has every component and its value highlighted on PCB drawings and it's strongly recommended to use during assembly process.
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You can skip this step if PCB assembly service was used in previous steps.
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---
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@ -59,17 +63,18 @@ There are no special requirements for soldering components to board. All chips a
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**Please read the following instructions carefully before proceeding with programming.**
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For initial programming you are going to need a PC and a USB to UART (serial) adapter (3.3V signaling is required). These steps assume you are using modern Windows OS (version 10 or higher).
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For initial programming you are going to need a PC and a USB to UART (serial) adapter (3.3V signaling is required).
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These steps assume you are using modern Windows OS (version 10 or higher).
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As for software here's list of required applications:
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- [FT_PROG](https://ftdichip.com/utilities/#ft_prog) - FTDI FT232H EEPROM programming software
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- [Python 3](https://www.python.org/downloads/) with `pip3` - necessary for initial programming script, `primer.py`
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- [Python 3](https://www.python.org/downloads/) with `pip3` - necessary for initial programming script: `primer.py`
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Programming must be done in specific order for `primer.py` script to work correctly.
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First, program FT232H EEPROM:
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1. Connect SC64 board to the PC with USB-C cable
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2. Locate FT232H EEPROM template in `fw/ftdi` folder
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2. Locate FT232H EEPROM template `ft232h_config.xml`
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3. Launch `FT_PROG` software
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4. Click on `Scan and parse` if no device has shown up
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5. Right click on SC64 device and choose `Apply Template -> From File`
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@ -78,18 +83,18 @@ First, program FT232H EEPROM:
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Your SC64 should be ready for next programming step.
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Second, program FPGA, microcontroller and Flash memory:
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Second, program FPGA, microcontroller and bootloader:
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1. Disconnect SC64 board from power (unplug USB-C cable)
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2. Connect serial adapter to `TX/RX/GND` pads marked on the PCB
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3. Connect serial adapter to the PC
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4. Check in device manager which port number `COMx` is assigned to serial adapter
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5. Connect SC64 board to the PC with USB-C cable (***IMPORTANT:*** connect it to the same computer as serial adapter)
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6. Locate `primer.py` script in root folder
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7. Make sure these files are located in the same folder as `primer.py` script: `requirements.txt`, `sc64.py`, `sc64-firmware.bin`
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7. Make sure these files are located in the same folder as `primer.py` script: `requirements.txt`, `sc64-firmware.bin`
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8. Run `pip3 install -r requirements.txt` to install required python packages
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9. Run `python3 primer.py COMx sc64-firmware.bin` (replace `COMx` with port located in step **4**)
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10. Follow the instructions on the screen
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11. Wait until programming process has finished (**DO NOT STOP PROGRAMMING PROCESS OR DISCONNECT SC64 BOARD FROM PC**, doing so might irrecoverably break programming through UART header and you would need to program microcontroller, FPGA and bootloader with separate dedicated programming interfaces through *Tag-Connect* connector on the PCB)
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11. Wait until programming process has finished (**DO NOT STOP PROGRAMMING PROCESS OR DISCONNECT SC64 BOARD FROM PC**, doing so might irrecoverably break programming through UART header and you would need to program FPGA and/or microcontroller with separate dedicated programming interfaces through *Tag-Connect* connector on the PCB)
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Congratulations! Your SC64 flashcart should be ready for use!
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@ -99,4 +104,7 @@ Congratulations! Your SC64 flashcart should be ready for use!
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*`primer.py` threw error on `Bootloader -> SC64 FLASH` step*
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This issue can be attributed to incorrectly programmed FT232H EEPROM in the first programming step. Check again in `FT_PROG` program if device was configured properly. Once FPGA and microcontroller has been programmed successfully `primer.py` script needs to be run in special mode. Please use command `python3 primer.py COMx sc64-firmware.bin --only-bootloader` to try programming bootloader again.
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This issue can be attributed to incorrectly programmed FT232H EEPROM in the first programming step.
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Check again in `FT_PROG` application if device was configured properly.
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Once FPGA and microcontroller has been programmed successfully `primer.py` script needs to be run in special mode.
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Please use command `python3 primer.py COMx sc64-firmware.bin --bootloader-only` to try programming bootloader again.
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@ -397,10 +397,8 @@ bool cfg_update_setting (uint32_t *args) {
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return false;
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}
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bool cfg_set_rom_write_enable (bool value) {
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uint32_t scr = fpga_reg_get(REG_CFG_SCR);
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void cfg_set_rom_write_enable (bool value) {
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cfg_change_scr_bits(CFG_SCR_ROM_WRITE_ENABLED, value);
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return (scr & CFG_SCR_ROM_WRITE_ENABLED);
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}
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save_type_t cfg_get_save_type (void) {
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@ -21,7 +21,7 @@ bool cfg_query (uint32_t *args);
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bool cfg_update (uint32_t *args);
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bool cfg_query_setting (uint32_t *args);
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bool cfg_update_setting (uint32_t *args);
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bool cfg_set_rom_write_enable (bool value);
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void cfg_set_rom_write_enable (bool value);
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save_type_t cfg_get_save_type (void);
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void cfg_get_time (uint32_t *args);
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void cfg_set_time (uint32_t *args);
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@ -281,7 +281,9 @@ static void usb_rx_process (void) {
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break;
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case 'U':
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if ((p.read_length > 0) && usb_dma_ready()) {
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if (p.rx_args[1] == 0) {
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p.rx_state = RX_STATE_IDLE;
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} else if ((p.read_length > 0) && usb_dma_ready()) {
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uint32_t length = (p.read_length > p.rx_args[1]) ? p.rx_args[1] : p.read_length;
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if (!p.rx_dma_running) {
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fpga_reg_set(REG_USB_DMA_ADDRESS, p.read_address);
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@ -295,9 +297,6 @@ static void usb_rx_process (void) {
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p.read_length -= length;
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p.read_address += length;
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p.read_ready = true;
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if (p.rx_args[1] == 0) {
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p.rx_state = RX_STATE_IDLE;
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}
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}
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}
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break;
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@ -328,19 +327,17 @@ static void usb_rx_process (void) {
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p.response_pending = true;
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break;
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case 'f': {
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bool rom_write_enable_restore = cfg_set_rom_write_enable(false);
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case 'f':
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cfg_set_rom_write_enable(false);
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p.response_info.data[0] = update_backup(p.rx_args[0], &p.response_info.data[1]);
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p.rx_state = RX_STATE_IDLE;
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p.response_pending = true;
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p.response_error = (p.response_info.data[0] != UPDATE_OK);
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p.response_info.data_length = 8;
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cfg_set_rom_write_enable(rom_write_enable_restore);
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break;
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}
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case 'F': {
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bool rom_write_enable_restore = cfg_set_rom_write_enable(false);
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case 'F':
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cfg_set_rom_write_enable(false);
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p.response_info.data[0] = update_prepare(p.rx_args[0], p.rx_args[1]);
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p.rx_state = RX_STATE_IDLE;
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p.response_pending = true;
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@ -349,10 +346,8 @@ static void usb_rx_process (void) {
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p.response_info.done_callback = update_start;
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} else {
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p.response_error = true;
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cfg_set_rom_write_enable(rom_write_enable_restore);
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}
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break;
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}
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case '?':
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p.rx_state = RX_STATE_IDLE;
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Sram128kB,
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}
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const HASH_CHUNK_LENGTH: usize = 256 * 1024;
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const HASH_CHUNK_LENGTH: usize = 1 * 1024 * 1024;
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pub fn guess_save_type<T: Read + Seek>(
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reader: &mut T,
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11
sw/pc/.gitignore
vendored
11
sw/pc/.gitignore
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/__pycache__
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/build
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/dist
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*.bin
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*.eep
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*.fla
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*.n64
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*.spec
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*.srm
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*.v64
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*.z64
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sw/pc/sc64.py
1422
sw/pc/sc64.py
File diff suppressed because it is too large
Load Diff
2
sw/update/.gitignore → sw/tools/.gitignore
vendored
2
sw/update/.gitignore → sw/tools/.gitignore
vendored
@ -1 +1 @@
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*.bin
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*.bin
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File diff suppressed because it is too large
Load Diff
@ -1,2 +1 @@
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Pillow==9.2.0
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pyserial==3.5
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sw/update/update.py → sw/tools/update.py
Executable file → Normal file
12
sw/update/update.py → sw/tools/update.py
Executable file → Normal file
@ -145,13 +145,13 @@ class JedecFile:
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class SC64UpdateData:
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__UPDATE_TOKEN = b'SC64 Update v2.0'
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__UPDATE_TOKEN = b'SC64 Update v2.0'
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__CHUNK_ID_UPDATE_INFO = 1
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__CHUNK_ID_MCU_DATA = 2
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__CHUNK_ID_FPGA_DATA = 3
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__CHUNK_ID_BOOTLOADER_DATA = 4
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__CHUNK_ID_PRIMER_DATA = 5
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__CHUNK_ID_UPDATE_INFO = 1
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__CHUNK_ID_MCU_DATA = 2
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__CHUNK_ID_FPGA_DATA = 3
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__CHUNK_ID_BOOTLOADER_DATA = 4
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__CHUNK_ID_PRIMER_DATA = 5
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__data = b''
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