The-Homebrew-Cloud/SummerCart64
2
0
Fork 0
mirror of https://github.com/Polprzewodnikowy/SummerCart64.git synced 2024-11-25 07:06:52 +01:00
Code Issues Packages Projects Releases Wiki Activity

[SC64][SW] Removed IPL3 version bit spoofing

Browse Source
This commit is contained in:
Mateusz Faderewski 2023-02-06 19:41:33 +01:00
parent 62bb745f14
commit 62a5b6a062
4 changed files with 24 additions and 30 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

37
sw/bootloader/src/boot.c
View File

@ -9,23 +9,22 @@ extern uint32_t ipl2 __attribute__((section(".data")));
typedef struct { typedef struct {
const uint32_t crc32; const uint32_t crc32;
const uint8_t seed; const uint8_t seed;
const uint8_t version;
} ipl3_crc32_t; } ipl3_crc32_t;
static const ipl3_crc32_t ipl3_crc32[] = { static const ipl3_crc32_t ipl3_crc32[] = {
{ .crc32 = 0x587BD543, .seed = 0xAC, .version = 0 }, // 5101 { .crc32 = 0x587BD543, .seed = 0xAC }, // 5101
{ .crc32 = 0x6170A4A1, .seed = 0x3F, .version = 1 }, // 6101 { .crc32 = 0x6170A4A1, .seed = 0x3F }, // 6101
{ .crc32 = 0x009E9EA3, .seed = 0x3F, .version = 1 }, // 7102 { .crc32 = 0x009E9EA3, .seed = 0x3F }, // 7102
{ .crc32 = 0x90BB6CB5, .seed = 0x3F, .version = 0 }, // x102 { .crc32 = 0x90BB6CB5, .seed = 0x3F }, // x102
{ .crc32 = 0x0B050EE0, .seed = 0x78, .version = 0 }, // x103 { .crc32 = 0x0B050EE0, .seed = 0x78 }, // x103
{ .crc32 = 0x98BC2C86, .seed = 0x91, .version = 0 }, // x105 { .crc32 = 0x98BC2C86, .seed = 0x91 }, // x105
{ .crc32 = 0xACC8580A, .seed = 0x85, .version = 0 }, // x106 { .crc32 = 0xACC8580A, .seed = 0x85 }, // x106
{ .crc32 = 0x0E018159, .seed = 0xDD, .version = 0 }, // 5167 { .crc32 = 0x0E018159, .seed = 0xDD }, // 5167
{ .crc32 = 0x10C68B18, .seed = 0xDD, .version = 0 }, // NDXJ0 { .crc32 = 0x10C68B18, .seed = 0xDD }, // NDXJ0
{ .crc32 = 0xBC605D0A, .seed = 0xDD, .version = 0 }, // NDDJ0 { .crc32 = 0xBC605D0A, .seed = 0xDD }, // NDDJ0
{ .crc32 = 0x502C4466, .seed = 0xDD, .version = 0 }, // NDDJ1 { .crc32 = 0x502C4466, .seed = 0xDD }, // NDDJ1
{ .crc32 = 0x0C965795, .seed = 0xDD, .version = 0 }, // NDDJ2 { .crc32 = 0x0C965795, .seed = 0xDD }, // NDDJ2
{ .crc32 = 0x8FEBA21E, .seed = 0xDE, .version = 0 }, // NDDE0 { .crc32 = 0x8FEBA21E, .seed = 0xDE }, // NDDE0
}; };
@ -64,7 +63,7 @@ static bool boot_get_tv_type (boot_info_t *info) {
return true; return true;
} }
static bool boot_get_cic_seed_version (boot_info_t *info) { static bool boot_get_cic_seed (boot_info_t *info) {
io32_t *base = boot_get_device_base(info); io32_t *base = boot_get_device_base(info);
uint32_t ipl3[1008] __attribute__((aligned(8))); uint32_t ipl3[1008] __attribute__((aligned(8)));
@ -76,7 +75,6 @@ static bool boot_get_cic_seed_version (boot_info_t *info) {
for (int i = 0; i < sizeof(ipl3_crc32) / sizeof(ipl3_crc32_t); i++) { for (int i = 0; i < sizeof(ipl3_crc32) / sizeof(ipl3_crc32_t); i++) {
if (ipl3_crc32[i].crc32 == crc32) { if (ipl3_crc32[i].crc32 == crc32) {
info->cic_seed = ipl3_crc32[i].seed; info->cic_seed = ipl3_crc32[i].seed;
info->version = ipl3_crc32[i].version;
return true; return true;
} }
} }
@ -84,14 +82,13 @@ static bool boot_get_cic_seed_version (boot_info_t *info) {
return false; return false;
} }
void boot (boot_info_t *info, bool detect_tv_type, bool detect_cic_seed_version) { void boot (boot_info_t *info, bool detect_tv_type, bool detect_cic_seed) {
if (detect_tv_type && !boot_get_tv_type(info)) { if (detect_tv_type && !boot_get_tv_type(info)) {
info->tv_type = OS_INFO->tv_type; info->tv_type = OS_INFO->tv_type;
} }
if (detect_cic_seed_version && !boot_get_cic_seed_version(info)) { if (detect_cic_seed && !boot_get_cic_seed(info)) {
info->cic_seed = 0x3F; info->cic_seed = 0x3F;
info->version = 0;
} }
OS_INFO->mem_size_6105 = OS_INFO->mem_size; OS_INFO->mem_size_6105 = OS_INFO->mem_size;
@ -149,7 +146,7 @@ void boot (boot_info_t *info, bool detect_tv_type, bool detect_cic_seed_version)
tv_type = (info->tv_type & 0x03); tv_type = (info->tv_type & 0x03);
reset_type = (info->reset_type & 0x01); reset_type = (info->reset_type & 0x01);
cic_seed = (info->cic_seed & 0xFF); cic_seed = (info->cic_seed & 0xFF);
version = (info->version & 0x01); version = 1;
stack_pointer = (void *) UNCACHED(&SP_MEM->IMEM[1020]); stack_pointer = (void *) UNCACHED(&SP_MEM->IMEM[1020]);
asm volatile ( asm volatile (

3
sw/bootloader/src/boot.h
View File

@ -28,11 +28,10 @@ typedef struct {
boot_reset_type_t reset_type; boot_reset_type_t reset_type;
boot_tv_type_t tv_type; boot_tv_type_t tv_type;
uint8_t cic_seed; uint8_t cic_seed;
uint8_t version;
} boot_info_t; } boot_info_t;
void boot (boot_info_t *info, bool detect_tv_type, bool detect_cic_seed_version); void boot (boot_info_t *info, bool detect_tv_type, bool detect_cic_seed);
#endif #endif

7
sw/bootloader/src/main.c
View File

@ -31,14 +31,13 @@ void main (void) {
} }
bool detect_tv_type = (sc64_boot_info.tv_type == TV_TYPE_UNKNOWN); bool detect_tv_type = (sc64_boot_info.tv_type == TV_TYPE_UNKNOWN);
bool detect_cic_seed_version = (sc64_boot_info.cic_seed == CIC_SEED_UNKNOWN); bool detect_cic_seed = (sc64_boot_info.cic_seed == CIC_SEED_UNKNOWN);
boot_info.reset_type = OS_INFO->reset_type; boot_info.reset_type = OS_INFO->reset_type;
boot_info.tv_type = sc64_boot_info.tv_type; boot_info.tv_type = sc64_boot_info.tv_type;
boot_info.cic_seed = sc64_boot_info.cic_seed & 0xFF; boot_info.cic_seed = (sc64_boot_info.cic_seed & 0xFF);
boot_info.version = (sc64_boot_info.cic_seed >> 8) & 0x01;
deinit(); deinit();
boot(&boot_info, detect_tv_type, detect_cic_seed_version); boot(&boot_info, detect_tv_type, detect_cic_seed);
} }

7
sw/pc/sc64.py
View File

@ -293,12 +293,11 @@ class SC64:
SRAM_3X = 5 SRAM_3X = 5
class CICSeed(IntEnum): class CICSeed(IntEnum):
ALECK = 0xAC DEFAULT = 0x3F
X101 = 0x13F
X102 = 0x3F
X103 = 0x78 X103 = 0x78
X105 = 0x91 X105 = 0x91
X106 = 0x85 X106 = 0x85
ALECK = 0xAC
DD_JP = 0xDD DD_JP = 0xDD
DD_US = 0xDE DD_US = 0xDE
AUTO = 0xFFFF AUTO = 0xFFFF
@ -487,7 +486,7 @@ class SC64:
def set_cic_seed(self, seed: int) -> None: def set_cic_seed(self, seed: int) -> None:
if (seed != self.CICSeed.AUTO): if (seed != self.CICSeed.AUTO):
if (seed < 0 or seed > 0x1FF): if (seed < 0 or seed > 0xFF):
raise ValueError('CIC seed outside of allowed values') raise ValueError('CIC seed outside of allowed values')
self.__set_config(self.__CfgId.CIC_SEED, seed) self.__set_config(self.__CfgId.CIC_SEED, seed)