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dma_working
This commit is contained in:
Polprzewodnikowy
parent
5524487f80
commit
676bf07d91
@ -302,5 +302,254 @@ set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
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# ------------------------
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# ------------------------
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set_global_assignment -name QIP_FILE rtl/intel/gpio/intel_gpio_ddro.qip
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set_global_assignment -name QIP_FILE rtl/intel/gpio/intel_gpio_ddro.qip
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set_global_assignment -name SLD_NODE_CREATOR_ID 110 -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_ENTITY_NAME sld_signaltap -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_clk -to "system:system_inst|intel_pll:intel_pll_inst|altpll:altpll_component|clk[0]" -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_RAM_BLOCK_TYPE=AUTO" -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_NODE_INFO=805334528" -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_POWER_UP_TRIGGER=0" -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ATTRIBUTE_MEM_MODE=OFF" -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STATE_FLOW_USE_GENERATED=0" -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STATE_BITS=11" -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_BUFFER_FULL_STOP=1" -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_CURRENT_RESOURCE_WIDTH=1" -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_INCREMENTAL_ROUTING=1" -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[0] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[1] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[2] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[3] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[6] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[7] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[10] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[13] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[14] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[15] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[16] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[17] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[19] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[25] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[26] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[27] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[28] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[30] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_LEVEL=1" -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_IN_ENABLED=0" -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_PIPELINE=0" -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_RAM_PIPELINE=0" -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_COUNTER_PIPELINE=0" -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ADVANCED_TRIGGER_ENTITY=basic,1," -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_LEVEL_PIPELINE=1" -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ENABLE_ADVANCED_TRIGGER=0" -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STORAGE_QUALIFIER_INVERSION_MASK_LENGTH=0" -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[4] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[8] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[9] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[12] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[18] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[20] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[22] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[24] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[29] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[31] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[5] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[11] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[21] -to auto_signaltap_0|vcc -section_id auto_signaltap_0
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set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT crc[23] -to auto_signaltap_0|gnd -section_id auto_signaltap_0
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set_global_assignment -name SOURCE_FILE sfp.spf
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_SEGMENT_SIZE=1024" -section_id auto_signaltap_0
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set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_SAMPLE_DEPTH=1024" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[0] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.ack" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[1] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[0]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[2] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[10]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[3] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[11]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[4] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[12]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[5] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[13]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[6] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[14]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[7] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[15]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[8] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[16]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[9] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[17]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[10] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[18]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[11] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[19]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[12] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[1]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[13] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[20]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[14] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[21]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[15] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[22]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[16] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[23]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[17] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[24]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[18] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[25]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[19] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[26]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[20] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[27]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[21] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[28]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[22] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[29]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[23] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[2]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[24] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[30]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[25] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[31]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[26] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[3]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[27] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[4]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[28] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[5]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[29] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[6]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[30] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[7]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[31] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[8]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[32] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[9]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[33] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.id[0]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[34] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.id[1]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[35] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.request" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[36] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.rx_empty" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[37] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.rx_rdata[0]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[38] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.rx_rdata[1]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[39] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.rx_rdata[2]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[40] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.rx_rdata[3]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[41] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.rx_rdata[4]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[42] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.rx_rdata[5]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[43] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.rx_rdata[6]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[44] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.rx_rdata[7]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[45] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.rx_read" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[46] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.wdata[0]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[47] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.wdata[10]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[48] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.wdata[11]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[49] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.wdata[12]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[50] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.wdata[13]" -section_id auto_signaltap_0
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set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[51] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.wdata[14]" -section_id auto_signaltap_0
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||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[52] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.wdata[15]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[53] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.wdata[1]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[54] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.wdata[2]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[55] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.wdata[3]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[56] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.wdata[4]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[57] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.wdata[5]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[58] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.wdata[6]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[59] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.wdata[7]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[60] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.wdata[8]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[61] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.wdata[9]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[62] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.write" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[63] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[0]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[64] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[10]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[65] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[11]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[66] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[12]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[67] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[13]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[68] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[14]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[69] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[15]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[70] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[16]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[71] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[17]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[72] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[18]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[73] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[19]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[74] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[1]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[75] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[20]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[76] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[21]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[77] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[22]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[78] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[23]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[79] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[24]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[80] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[25]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[81] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[26]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[82] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[27]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[83] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[2]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[84] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[3]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[85] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[4]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[86] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[5]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[87] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[6]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[88] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[7]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[89] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[8]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[90] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[9]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[91] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|state.S_FETCH" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[92] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|state.S_IDLE" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[93] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|state.S_TRANSFER" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[0] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.ack" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[1] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[0]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[2] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[10]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[3] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[11]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[4] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[12]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[5] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[13]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[6] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[14]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[7] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[15]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[8] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[16]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[9] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[17]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[10] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[18]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[11] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[19]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[12] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[1]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[13] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[20]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[14] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[21]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[15] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[22]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[16] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[23]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[17] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[24]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[18] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[25]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[19] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[26]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[20] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[27]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[21] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[28]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[22] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[29]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[23] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[2]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[24] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[30]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[25] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[31]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[26] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[3]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[27] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[4]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[28] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[5]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[29] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[6]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[30] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[7]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[31] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[8]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[32] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.address[9]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[33] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.id[0]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[34] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.id[1]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[35] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.request" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[36] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.rx_empty" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[37] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.rx_rdata[0]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[38] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.rx_rdata[1]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[39] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.rx_rdata[2]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[40] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.rx_rdata[3]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[41] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.rx_rdata[4]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[42] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.rx_rdata[5]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[43] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.rx_rdata[6]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[44] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.rx_rdata[7]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[45] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.rx_read" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[46] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.wdata[0]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[47] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.wdata[10]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[48] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.wdata[11]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[49] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.wdata[12]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[50] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.wdata[13]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[51] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.wdata[14]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[52] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.wdata[15]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[53] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.wdata[1]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[54] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.wdata[2]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[55] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.wdata[3]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[56] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.wdata[4]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[57] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.wdata[5]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[58] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.wdata[6]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[59] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.wdata[7]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[60] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.wdata[8]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[61] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.wdata[9]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[62] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|dma.write" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[63] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[0]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[64] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[10]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[65] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[11]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[66] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[12]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[67] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[13]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[68] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[14]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[69] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[15]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[70] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[16]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[71] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[17]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[72] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[18]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[73] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[19]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[74] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[1]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[75] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[20]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[76] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[21]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[77] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[22]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[78] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[23]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[79] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[24]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[80] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[25]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[81] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[26]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[82] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[27]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[83] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[2]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[84] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[3]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[85] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[4]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[86] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[5]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[87] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[6]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[88] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[7]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[89] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[8]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[90] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|length[9]" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[91] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|state.S_FETCH" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[92] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|state.S_IDLE" -section_id auto_signaltap_0
|
||||||
|
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[93] -to "cpu_soc:cpu_soc_inst|cpu_dma:cpu_dma_inst|state.S_TRANSFER" -section_id auto_signaltap_0
|
||||||
|
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_DATA_BITS=94" -section_id auto_signaltap_0
|
||||||
|
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_BITS=94" -section_id auto_signaltap_0
|
||||||
|
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STORAGE_QUALIFIER_BITS=128" -section_id auto_signaltap_0
|
||||||
|
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_INVERSION_MASK=000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" -section_id auto_signaltap_0
|
||||||
|
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_INVERSION_MASK_LENGTH=306" -section_id auto_signaltap_0
|
||||||
set_global_assignment -name SLD_FILE db/stp_auto_stripped.stp
|
set_global_assignment -name SLD_FILE db/stp_auto_stripped.stp
|
||||||
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
|
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
|
||||||
@ -65,7 +65,7 @@ __NAKED__ int main (void) {
|
|||||||
tmp[1] = 0;
|
tmp[1] = 0;
|
||||||
|
|
||||||
GPIO_OE = (1 << 0);
|
GPIO_OE = (1 << 0);
|
||||||
GPIO_O = (1 << 0);
|
GPIO_O = 0; // (1 << 0);
|
||||||
|
|
||||||
DMA_SCR = DMA_SCR_STOP;
|
DMA_SCR = DMA_SCR_STOP;
|
||||||
USB_SCR = USB_SCR_FLUSH_TX | USB_SCR_FLUSH_TX;
|
USB_SCR = USB_SCR_FLUSH_TX | USB_SCR_FLUSH_TX;
|
||||||
@ -74,7 +74,7 @@ __NAKED__ int main (void) {
|
|||||||
arg1 = 0;
|
arg1 = 0;
|
||||||
arg2 = 0;
|
arg2 = 0;
|
||||||
|
|
||||||
print("\r\nLoop start\r\n");
|
print("Loop start\r\n");
|
||||||
|
|
||||||
for (int i = 0; i < 4; i++) {
|
for (int i = 0; i < 4; i++) {
|
||||||
while (!(USB_SCR & USB_SCR_RXNE));
|
while (!(USB_SCR & USB_SCR_RXNE));
|
||||||
@ -124,11 +124,6 @@ __NAKED__ int main (void) {
|
|||||||
|
|
||||||
while (DMA_SCR & DMA_SCR_BUSY);
|
while (DMA_SCR & DMA_SCR_BUSY);
|
||||||
|
|
||||||
// for (int i = 0; i < arg2; i++) {
|
|
||||||
// while (!(USB_SCR & USB_SCR_RXNE));
|
|
||||||
// data = USB_DR;
|
|
||||||
// }
|
|
||||||
|
|
||||||
print("Finished DMA\r\n");
|
print("Finished DMA\r\n");
|
||||||
|
|
||||||
for (int i = 0; i < 4; i++) {
|
for (int i = 0; i < 4; i++) {
|
||||||
@ -140,10 +135,10 @@ __NAKED__ int main (void) {
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
print("Sent response ");
|
print("Sent response CMP");
|
||||||
tmp[0] = cmd;
|
tmp[0] = cmd;
|
||||||
print(tmp);
|
print(tmp);
|
||||||
print("\r\n");
|
print("\r\n\r\n");
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -51,9 +51,11 @@ interface if_dma ();
|
|||||||
|
|
||||||
always_comb begin
|
always_comb begin
|
||||||
rx_rdata = 8'd0;
|
rx_rdata = 8'd0;
|
||||||
|
rx_empty = 1'b0;
|
||||||
|
tx_full = 1'b0;
|
||||||
|
|
||||||
for (integer i = 0; i < NUM_DEVICES; i++) begin
|
for (integer i = 0; i < NUM_DEVICES; i++) begin
|
||||||
rx_rdata = rx_rdata | device_rx_rdata[i];
|
rx_rdata = rx_rdata | device_rx_rdata[i];//(device_rx_rdata[i] & {8{id == i[1:0]});
|
||||||
rx_empty = rx_empty | (device_rx_empty[i] && id == i[1:0]);
|
rx_empty = rx_empty | (device_rx_empty[i] && id == i[1:0]);
|
||||||
tx_full = tx_full | (device_tx_full[i] && id == i[1:0]);
|
tx_full = tx_full | (device_tx_full[i] && id == i[1:0]);
|
||||||
end
|
end
|
||||||
@ -92,89 +94,121 @@ module cpu_dma (
|
|||||||
if_dma.controller dma
|
if_dma.controller dma
|
||||||
);
|
);
|
||||||
|
|
||||||
|
typedef enum bit [2:0] {
|
||||||
|
S_IDLE,
|
||||||
|
S_FETCH,
|
||||||
|
S_TRANSFER
|
||||||
|
} e_state;
|
||||||
|
|
||||||
|
e_state state;
|
||||||
|
logic direction;
|
||||||
|
logic [27:0] length;
|
||||||
|
logic [15:0] rdata_buffer;
|
||||||
|
|
||||||
|
always_comb begin
|
||||||
|
bus.rdata = 32'd0;
|
||||||
|
if (bus.ack) begin
|
||||||
|
case (bus.address[3:2])
|
||||||
|
0: bus.rdata = {28'd0, state != S_IDLE, direction, 2'b00};
|
||||||
|
1: bus.rdata = dma.address;
|
||||||
|
2: bus.rdata = {2'b00, dma.id, length};
|
||||||
|
endcase
|
||||||
|
end
|
||||||
|
end
|
||||||
|
|
||||||
|
logic byte_counter;
|
||||||
|
|
||||||
always_ff @(posedge sys.clk) begin
|
always_ff @(posedge sys.clk) begin
|
||||||
bus.ack <= 1'b0;
|
bus.ack <= 1'b0;
|
||||||
if (bus.request) begin
|
if (bus.request) begin
|
||||||
bus.ack <= 1'b1;
|
bus.ack <= 1'b1;
|
||||||
end
|
end
|
||||||
|
|
||||||
|
dma.rx_read <= 1'b0;
|
||||||
|
dma.tx_write <= 1'b0;
|
||||||
|
|
||||||
|
if (sys.reset) begin
|
||||||
|
state <= S_IDLE;
|
||||||
|
dma.request <= 1'b0;
|
||||||
|
end else begin
|
||||||
|
case (state)
|
||||||
|
S_IDLE: begin
|
||||||
|
if (bus.request) begin
|
||||||
|
case (bus.address[3:2])
|
||||||
|
0: if (bus.wmask[0]) begin
|
||||||
|
direction <= bus.wdata[2];
|
||||||
|
if (bus.wdata[0]) begin
|
||||||
|
state <= S_FETCH;
|
||||||
|
byte_counter <= 1'b0;
|
||||||
|
end
|
||||||
|
end
|
||||||
|
|
||||||
|
1: if (&bus.wmask) begin
|
||||||
|
dma.address <= bus.wdata;
|
||||||
|
end
|
||||||
|
|
||||||
|
2: if (&bus.wmask) begin
|
||||||
|
{dma.id, length} <= {bus.wdata[29:1], 1'b0};
|
||||||
|
end
|
||||||
|
endcase
|
||||||
|
end
|
||||||
|
end
|
||||||
|
|
||||||
|
S_FETCH: begin
|
||||||
|
if (length != 28'd0) begin
|
||||||
|
if (direction) begin
|
||||||
|
if (!dma.rx_empty && !dma.rx_read) begin
|
||||||
|
dma.rx_read <= 1'b1;
|
||||||
|
dma.wdata <= {dma.wdata[7:0], dma.rx_rdata};
|
||||||
|
byte_counter <= ~byte_counter;
|
||||||
|
if (byte_counter) begin
|
||||||
|
state <= S_TRANSFER;
|
||||||
|
dma.request <= 1'b1;
|
||||||
|
dma.write <= 1'b1;
|
||||||
|
end
|
||||||
|
end
|
||||||
|
end else begin
|
||||||
|
dma.request <= 1'b1;
|
||||||
|
dma.write <= 1'b0;
|
||||||
|
if (dma.ack) begin
|
||||||
|
state <= S_TRANSFER;
|
||||||
|
dma.request <= 1'b0;
|
||||||
|
rdata_buffer <= dma.rdata;
|
||||||
|
end
|
||||||
|
end
|
||||||
|
end else begin
|
||||||
|
state <= S_IDLE;
|
||||||
|
end
|
||||||
|
end
|
||||||
|
|
||||||
|
S_TRANSFER: begin
|
||||||
|
if (direction) begin
|
||||||
|
if (dma.ack) begin
|
||||||
|
state <= S_FETCH;
|
||||||
|
dma.request <= 1'b0;
|
||||||
|
dma.address <= dma.address + 2'd2;
|
||||||
|
length <= length - 2'd2;
|
||||||
|
end
|
||||||
|
end else begin
|
||||||
|
if (!dma.tx_full && !dma.tx_write) begin
|
||||||
|
dma.tx_write <= 1'b1;
|
||||||
|
dma.tx_wdata <= byte_counter ? rdata_buffer[7:0] : rdata_buffer[15:8];
|
||||||
|
byte_counter <= ~byte_counter;
|
||||||
|
if (byte_counter) begin
|
||||||
|
state <= S_FETCH;
|
||||||
|
dma.address <= dma.address + 2'd2;
|
||||||
|
length <= length - 2'd2;
|
||||||
|
end
|
||||||
|
end
|
||||||
|
end
|
||||||
|
end
|
||||||
|
|
||||||
|
default: begin
|
||||||
|
state <= S_IDLE;
|
||||||
|
dma.request <= 1'b0;
|
||||||
|
end
|
||||||
|
endcase
|
||||||
|
end
|
||||||
end
|
end
|
||||||
|
|
||||||
always_comb begin
|
|
||||||
bus.rdata = 32'd0;
|
|
||||||
// if (bus.ack) begin
|
|
||||||
// case (bus.address[2:2])
|
|
||||||
// 0: bus.rdata = {30'd0, ~tx_full, ~rx_empty};
|
|
||||||
// 1: bus.rdata = {24'd0, rx_rdata};
|
|
||||||
// default: bus.rdata = 32'd0;
|
|
||||||
// endcase
|
|
||||||
// end
|
|
||||||
end
|
|
||||||
|
|
||||||
always_ff @(posedge sys.clk) begin
|
|
||||||
// rx_flush <= 1'b0;
|
|
||||||
// cpu_rx_read <= 1'b0;
|
|
||||||
|
|
||||||
// tx_flush <= 1'b0;
|
|
||||||
// cpu_tx_write <= 1'b0;
|
|
||||||
|
|
||||||
// if (bus.request) begin
|
|
||||||
// case (bus.address[2:2])
|
|
||||||
// 2'd0: begin
|
|
||||||
// if (bus.wmask[0]) begin
|
|
||||||
// {tx_flush, rx_flush} <= bus.wdata[3:2];
|
|
||||||
// end
|
|
||||||
// end
|
|
||||||
|
|
||||||
// 2'd1: begin
|
|
||||||
// if (bus.wmask[0]) begin
|
|
||||||
// cpu_tx_write <= 1'b1;
|
|
||||||
// end else begin
|
|
||||||
// cpu_rx_read <= 1'b1;
|
|
||||||
// end
|
|
||||||
// end
|
|
||||||
// endcase
|
|
||||||
// end
|
|
||||||
end
|
|
||||||
// typedef enum bit [0:0] {
|
|
||||||
// S_IDLE,
|
|
||||||
// S_WAIT
|
|
||||||
// } e_state;
|
|
||||||
|
|
||||||
// e_state state;
|
|
||||||
|
|
||||||
// logic byte_counter;
|
|
||||||
|
|
||||||
// always_ff @(posedge sys.clk) begin
|
|
||||||
// rx_read <= 1'b0;
|
|
||||||
|
|
||||||
// if (sys.reset) begin
|
|
||||||
// dma.request <= 1'b0;
|
|
||||||
// dma.write <= 1'b1;
|
|
||||||
// dma.address <= 32'd0;
|
|
||||||
// state <= S_IDLE;
|
|
||||||
// byte_counter <= 1'b0;
|
|
||||||
// end else begin
|
|
||||||
// case (state)
|
|
||||||
// S_IDLE: begin
|
|
||||||
// if (!rx_empty && !rx_read) begin
|
|
||||||
// byte_counter <= ~byte_counter;
|
|
||||||
// rx_read <= 1'b1;
|
|
||||||
// dma.wdata <= {dma.wdata[7:0], rx_rdata};
|
|
||||||
// if (byte_counter) begin
|
|
||||||
// dma.request <= 1'b1;
|
|
||||||
// state <= S_WAIT;
|
|
||||||
// end
|
|
||||||
// end
|
|
||||||
// end
|
|
||||||
|
|
||||||
// S_WAIT: begin
|
|
||||||
// if (dma.ack) begin
|
|
||||||
// dma.address <= dma.address + 2'd2;
|
|
||||||
// dma.request <= 1'b0;
|
|
||||||
// state <= S_IDLE;
|
|
||||||
// end
|
|
||||||
// end
|
|
||||||
// endcase
|
|
||||||
// end
|
|
||||||
// end
|
|
||||||
endmodule
|
endmodule
|
||||||
|
|||||||
920
fw/stp.stp
920
fw/stp.stp
File diff suppressed because one or more lines are too long
Loading…
Reference in New Issue
Block a user