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interrupts disable macro

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This commit is contained in:
Mateusz Faderewski 2024-05-27 22:52:33 +02:00
parent 392ad5bece
commit 759df3b0f3
2 changed files with 28 additions and 20 deletions
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7
sw/bootloader/src/interrupts.h
View File

@ -5,6 +5,13 @@
#include <stdint.h> #include <stdint.h>
#define WITH_INTERRUPTS_DISABLED(x) { \
uint32_t __sr = interrupts_disable(); \
{ x } \
interrupts_restore(__sr); \
}
void interrupts_init (void); void interrupts_init (void);
uint32_t interrupts_disable (void); uint32_t interrupts_disable (void);
void interrupts_restore (uint32_t sr); void interrupts_restore (uint32_t sr);

41
sw/bootloader/src/io.c
View File

@ -73,38 +73,39 @@ uint32_t pi_busy (void) {
} }
uint32_t pi_io_read (io32_t *address) { uint32_t pi_io_read (io32_t *address) {
uint32_t sr = interrupts_disable(); uint32_t value;
while (pi_busy()); WITH_INTERRUPTS_DISABLED({
uint32_t value = cpu_io_read(address); while (pi_busy());
interrupts_restore(sr); value = cpu_io_read(address);
});
return value; return value;
} }
void pi_io_write (io32_t *address, uint32_t value) { void pi_io_write (io32_t *address, uint32_t value) {
uint32_t sr = interrupts_disable(); WITH_INTERRUPTS_DISABLED({
while (pi_busy()); while (pi_busy());
cpu_io_write(address, value); cpu_io_write(address, value);
interrupts_restore(sr); });
} }
void pi_dma_read (io32_t *address, void *buffer, size_t length) { void pi_dma_read (io32_t *address, void *buffer, size_t length) {
cache_data_hit_writeback_invalidate(buffer, length); cache_data_hit_writeback_invalidate(buffer, length);
uint32_t sr = interrupts_disable(); WITH_INTERRUPTS_DISABLED({
while (pi_busy()); while (pi_busy());
cpu_io_write(&PI->PADDR, (uint32_t) (PHYSICAL(address))); cpu_io_write(&PI->PADDR, (uint32_t) (PHYSICAL(address)));
cpu_io_write(&PI->MADDR, (uint32_t) (PHYSICAL(buffer))); cpu_io_write(&PI->MADDR, (uint32_t) (PHYSICAL(buffer)));
cpu_io_write(&PI->WDMA, length - 1); cpu_io_write(&PI->WDMA, length - 1);
interrupts_restore(sr); });
while (pi_busy()); while (pi_busy());
} }
void pi_dma_write (io32_t *address, void *buffer, size_t length) { void pi_dma_write (io32_t *address, void *buffer, size_t length) {
cache_data_hit_writeback(buffer, length); cache_data_hit_writeback(buffer, length);
uint32_t sr = interrupts_disable(); WITH_INTERRUPTS_DISABLED({
while (pi_busy()); while (pi_busy());
cpu_io_write(&PI->PADDR, (uint32_t) (PHYSICAL(address))); cpu_io_write(&PI->PADDR, (uint32_t) (PHYSICAL(address)));
cpu_io_write(&PI->MADDR, (uint32_t) (PHYSICAL(buffer))); cpu_io_write(&PI->MADDR, (uint32_t) (PHYSICAL(buffer)));
cpu_io_write(&PI->RDMA, length - 1); cpu_io_write(&PI->RDMA, length - 1);
interrupts_restore(sr); });
while (pi_busy()); while (pi_busy());
} }