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[SC64] Update README

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Polprzewodnikowy 2020-10-11 00:36:31 +02:00
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README.md
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@ -18,26 +18,26 @@ Folder **`sw`** contains several helper programs that makes flash cart work all
## What works
Currently hardware implements basic functionality for playing games - ROM emulation, bootloader and PC communication. You can send any ROM to the SDRAM from PC and if game doesn't check for save hardware then it most likely will work. Bootloader does all the work necessary to setup the console registers for specific CIC chip that game requires.
Currently hardware implements basic functionality for playing games - ROM emulation, 4/16K EEPROM, bootloader and PC communication. You can send any ROM to the SDRAM from PC and if game doesn't check for save hardware other than EEPROM then it most likely will work. Bootloader does all the work necessary to setup the console registers for specific CIC chip that game requires.
## Issues
There are several issues with the project at the moment in order of importance:
- Documentation is not finished for most of the modules.
- No save hardware implementation.
- No SD card interface hardware implementation.
- No RTC hardware implementation.
- Currently PC communication disables N64 PI interface completely as there's no bus arbiter implemented.
- No save write-back to SD card hardware implementation.
- PCB schematic is unorganized and some component values are missing.
- There's no BOM for hardware.
- Currently PC communication disables N64 PI interface completely as there's no bus arbiter implemented.
- No SD card interface hardware implementation.
- No save write-back to SD card hardware implementation.
- PCB design and necessary components needs to be reconsidered for next version.
- No SRAM/FlashRAM save hardware implementation.
- No RTC hardware implementation.
- No CIC implementation in FPGA, current solution uses [UltraCIC II](https://github.com/perkinsb1024/UltraCIC-II) based on ATtiny45.
## What's next
Current goal is to implement EEPROM save emulation.
Current goal is to document the project.
## Finished sample