Merge branch 'main' into new-irq

fw/rtl/memory/memory_dma.sv

@@ -178,9 +178,8 @@ module memory_dma (
 
     // RX FIFO controller
 
-    typedef enum bit [2:0] {
+    typedef enum bit [1:0] {
         RX_FIFO_BUS_STATE_IDLE,
-        RX_FIFO_BUS_STATE_WAIT,
         RX_FIFO_BUS_STATE_TRANSFER_1,
         RX_FIFO_BUS_STATE_TRANSFER_2,
         RX_FIFO_BUS_STATE_ACK
@@ -191,7 +190,6 @@ module memory_dma (
 
     logic rx_fifo_shift;
     logic rx_fifo_shift_delayed;
-    logic [1:0] rx_fifo_valid;
 
     always_ff @(posedge clk) begin
         if (reset || dma_stop) begin
@@ -211,29 +209,24 @@ module memory_dma (
         case (rx_fifo_bus_state)
             RX_FIFO_BUS_STATE_IDLE: begin
                 if (dma_start && dma_scb.direction) begin
-                    next_rx_fifo_bus_state = RX_FIFO_BUS_STATE_WAIT;
-                end
-            end
-
-            RX_FIFO_BUS_STATE_WAIT: begin
-                if (mem_bus_wdata_end) begin
-                    next_rx_fifo_bus_state = RX_FIFO_BUS_STATE_IDLE;
-                end else if (mem_bus_wdata_empty) begin
                     next_rx_fifo_bus_state = RX_FIFO_BUS_STATE_TRANSFER_1;
                 end
             end
 
             RX_FIFO_BUS_STATE_TRANSFER_1: begin
-                fifo_bus.rx_read = (!fifo_bus.rx_empty && rx_fifo_valid[1]);
+                fifo_bus.rx_read = (!fifo_bus.rx_empty && mem_bus_wdata_empty && mem_bus_wdata_valid[1] && !mem_bus_wdata_end);
-                if (!fifo_bus.rx_empty || !rx_fifo_valid[1]) begin
+                if ((!fifo_bus.rx_empty && mem_bus_wdata_empty) || !mem_bus_wdata_valid[1]) begin
                     next_rx_fifo_bus_state = RX_FIFO_BUS_STATE_TRANSFER_2;
                     rx_fifo_shift = 1'b1;
                 end
+                if (mem_bus_wdata_end) begin
+                    next_rx_fifo_bus_state = RX_FIFO_BUS_STATE_IDLE;
+                end
             end
 
             RX_FIFO_BUS_STATE_TRANSFER_2: begin
-                fifo_bus.rx_read = (!fifo_bus.rx_empty && rx_fifo_valid[1]);
+                fifo_bus.rx_read = (!fifo_bus.rx_empty && mem_bus_wdata_valid[0]);
-                if (!fifo_bus.rx_empty || !rx_fifo_valid[1]) begin
+                if (!fifo_bus.rx_empty || !mem_bus_wdata_valid[0]) begin
                     next_rx_fifo_bus_state = RX_FIFO_BUS_STATE_ACK;
                     rx_fifo_shift = 1'b1;
                 end
@@ -241,7 +234,7 @@ module memory_dma (
 
             RX_FIFO_BUS_STATE_ACK: begin
                 if (mem_bus_wdata_ready) begin
-                    next_rx_fifo_bus_state = RX_FIFO_BUS_STATE_WAIT;
+                    next_rx_fifo_bus_state = RX_FIFO_BUS_STATE_TRANSFER_1;
                 end
             end
 
@@ -255,26 +248,12 @@ module memory_dma (
         mem_bus_wdata_ready <= 1'b0;
         rx_fifo_shift_delayed <= rx_fifo_shift;
 
-        if (rx_fifo_shift) begin
-            rx_fifo_valid <= {rx_fifo_valid[0], 1'bX};
-        end
-
         if (rx_fifo_shift_delayed) begin
             if (rx_fifo_bus_state == RX_FIFO_BUS_STATE_ACK) begin
                 mem_bus_wdata_ready <= 1'b1;
             end
             mem_bus_wdata_buffer <= {mem_bus_wdata_buffer[7:0], fifo_bus.rx_rdata};
         end
-
-        case (rx_fifo_bus_state)
-            RX_FIFO_BUS_STATE_WAIT: begin
-                if (mem_bus_wdata_empty) begin
-                    rx_fifo_valid <= mem_bus_wdata_valid;
-                end
-            end
-
-            default: begin end
-        endcase
     end
 
 

sw/bootloader/src/sc64.h

@@ -8,8 +8,8 @@
 
 
 typedef enum {
-    ERROR_TYPE_CFG = 0,
+    ERROR_TYPE_CFG = 1,
-    ERROR_TYPE_SD_CARD = 1,
+    ERROR_TYPE_SD_CARD = 2,
 } sc64_error_type_t;
 
 typedef enum {

sw/controller/src/cfg.c

@@ -112,8 +112,8 @@ typedef enum {
 } translate_type_t;
 
 typedef enum {
-    ERROR_TYPE_CFG = 0,
+    ERROR_TYPE_CFG = 1,
-    ERROR_TYPE_SD_CARD = 1,
+    ERROR_TYPE_SD_CARD = 2,
 } error_type_t;
 
 typedef enum {

sw/deployer/src/main.rs

@@ -890,6 +890,22 @@ fn handle_firmware_command(
 fn handle_test_command(connection: Connection) -> Result<(), sc64::Error> {
     let mut sc64 = init_sc64(connection, false)?;
 
+    println!("{}: USB", "[SC64 Tests]".bold());
+
+    print!(" Performing USB write speed test... ");
+    stdout().flush().unwrap();
+    println!(
+        "{}",
+        format!("{:.2} MiB/s", sc64.test_usb_speed(true)?).bright_green()
+    );
+
+    print!(" Performing USB read speed test... ");
+    stdout().flush().unwrap();
+    println!(
+        "{}",
+        format!("{:.2} MiB/s", sc64.test_usb_speed(false)?).bright_green()
+    );
+
     println!("{}: SDRAM (pattern)", "[SC64 Tests]".bold());
 
     let sdram_pattern_tests = [

sw/deployer/src/sc64/ftdi.rs

@@ -486,7 +486,7 @@ impl FtdiDevice {
         wrapper.set_module_detach_mode(ModuleDetachMode::AutoDetachReattach);
         wrapper.set_interface(InterfaceIndex::A)?;
 
-        const CHUNK_SIZE: usize = 2 * 1024 * 1024;
+        const CHUNK_SIZE: usize = 1 * 1024 * 1024;
 
         wrapper.read_data_set_chunksize(CHUNK_SIZE)?;
         wrapper.write_data_set_chunksize(CHUNK_SIZE)?;

sw/deployer/src/sc64/mod.rs

@@ -101,7 +101,7 @@ const ISV_BUFFER_LENGTH: usize = 64 * 1024;
 
 pub const MEMORY_LENGTH: usize = 0x0500_2980;
 
-const MEMORY_CHUNK_LENGTH: usize = 1 * 1024 * 1024;
+const MEMORY_CHUNK_LENGTH: usize = 8 * 1024 * 1024;
 
 impl SC64 {
     fn command_identifier_get(&mut self) -> Result<[u8; 4], Error> {
@@ -752,6 +752,24 @@ impl SC64 {
         }
     }
 
+    pub fn test_usb_speed(&mut self, write: bool) -> Result<f64, Error> {
+        const TEST_ADDRESS: u32 = SDRAM_ADDRESS;
+        const TEST_LENGTH: usize = 8 * 1024 * 1024;
+        const MIB_DIVIDER: f64 = 1024.0 * 1024.0;
+
+        let data = vec![0x00; TEST_LENGTH];
+
+        let time = std::time::Instant::now();
+
+        if write {
+            self.command_memory_write(TEST_ADDRESS, &data)?;
+        } else {
+            self.command_memory_read(TEST_ADDRESS, TEST_LENGTH)?;
+        }
+
+        Ok((TEST_LENGTH as f64 / MIB_DIVIDER) / time.elapsed().as_secs_f64())
+    }
+
     pub fn test_sdram_pattern(
         &mut self,
         pattern: MemoryTestPattern,