mirror of
https://github.com/Polprzewodnikowy/SummerCart64.git
synced 2024-11-29 00:44:13 +01:00
update fixes
This commit is contained in:
parent
201a4d023a
commit
ab0c72ce26
1
fw/project/lcmxo2/.gitignore
vendored
1
fw/project/lcmxo2/.gitignore
vendored
@ -1,5 +1,6 @@
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.recovery
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*.dir/
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*.ccl
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*.html
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*.ini
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*.rva
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@ -28,6 +28,8 @@
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static io32_t exception_framebuffer[SCREEN_WIDTH * SCREEN_HEIGHT] __attribute__((aligned(64)));
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static int char_x;
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static int char_y;
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static const vi_regs_t vi_config[] = {{
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.CR = (
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VI_CR_PIXEL_ADVANCE_1 |
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@ -75,6 +77,9 @@ static void exception_init_screen (void) {
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const vi_regs_t *cfg = &vi_config[OS_INFO->tv_type];
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uint32_t *background_data = (uint32_t *) (&assets_exception_background);
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char_x = BORDER_WIDTH;
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char_y = BORDER_HEIGHT;
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for (int i = 0; i < (SCREEN_WIDTH * SCREEN_HEIGHT); i += 2) {
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io_write(&exception_framebuffer[i], *background_data);
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io_write(&exception_framebuffer[i + 1], *background_data);
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@ -98,18 +103,15 @@ static void exception_init_screen (void) {
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}
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static void exception_draw_character (char c) {
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static int x = BORDER_WIDTH;
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static int y = BORDER_HEIGHT;
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if (c == '\n') {
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x = BORDER_WIDTH;
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y += LINE_HEIGHT;
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char_x = BORDER_WIDTH;
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char_y += LINE_HEIGHT;
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return;
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}
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if ((x + FONT_WIDTH) > (SCREEN_WIDTH - BORDER_WIDTH)) {
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x = BORDER_WIDTH;
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y += LINE_HEIGHT;
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if ((char_x + FONT_WIDTH) > (SCREEN_WIDTH - BORDER_WIDTH)) {
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char_x = BORDER_WIDTH;
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char_y += LINE_HEIGHT;
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}
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if ((c < ' ') || (c > '~')) {
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@ -117,8 +119,8 @@ static void exception_draw_character (char c) {
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}
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for (int i = 0; i < (FONT_WIDTH * FONT_HEIGHT); i++) {
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int c_x = x + (i % FONT_WIDTH);
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int c_y = y + (i / FONT_WIDTH);
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int c_x = char_x + (i % FONT_WIDTH);
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int c_y = char_y + (i / FONT_WIDTH);
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if ((c_x >= (SCREEN_WIDTH - BORDER_WIDTH)) || (c_y >= (SCREEN_HEIGHT - BORDER_HEIGHT))) {
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break;
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@ -130,7 +132,7 @@ static void exception_draw_character (char c) {
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}
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}
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x += FONT_WIDTH;
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char_x += FONT_WIDTH;
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}
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static void exception_print_string (const char *s) {
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3
sw/controller/.gitignore
vendored
3
sw/controller/.gitignore
vendored
@ -1,3 +1,2 @@
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/build_app
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/build_loader
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/build
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*.svd
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@ -8,7 +8,7 @@
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#define CIC_STACK_SIZE (256)
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#define RTC_STACK_SIZE (256)
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#define GVR_STACK_SIZE (1024)
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#define GVR_STACK_SIZE (1536)
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uint8_t cic_stack[CIC_STACK_SIZE] __attribute__((aligned(8)));
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@ -267,9 +267,9 @@ void hw_crc32_reset (void) {
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uint32_t hw_crc32_calculate (uint8_t *data, uint32_t length) {
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for (uint32_t i = 0; i < length; i++) {
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*(__IO uint8_t *) (CRC->DR) = data[i];
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*(__IO uint8_t *) (&CRC->DR) = data[i];
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}
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return CRC->DR;
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return (CRC->DR ^ 0xFFFFFFFF);
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}
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uint32_t hw_flash_size (void) {
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@ -359,6 +359,10 @@ static void hw_init_mcu (void) {
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RCC->IOPENR |= RCC_IOPENR_GPIOAEN | RCC_IOPENR_GPIOBEN;
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SysTick->LOAD = (((64000000 / 1000)) - 1);
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SysTick->VAL = 0;
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SysTick->CTRL = (SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_ENABLE_Msk);
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hw_gpio_init(GPIO_ID_LED, GPIO_OUTPUT, GPIO_PP, GPIO_SPEED_VLOW, GPIO_PULL_NONE, GPIO_AF_0, 0);
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}
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@ -437,12 +441,10 @@ static void hw_init_tim (void) {
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}
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static void hw_init_misc (void) {
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SysTick->LOAD = (((64000000 / 1000)) - 1);
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SysTick->VAL = 0;
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SysTick->CTRL = (SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_ENABLE_Msk);
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RCC->AHBENR |= RCC_AHBENR_CRCEN;
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CRC->CR = (CRC_CR_REV_OUT | CRC_CR_REV_IN_0);
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hw_gpio_init(GPIO_ID_N64_RESET, GPIO_INPUT, GPIO_PP, GPIO_SPEED_VLOW, GPIO_PULL_DOWN, GPIO_AF_0, 0);
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hw_gpio_init(GPIO_ID_N64_CIC_CLK, GPIO_INPUT, GPIO_PP, GPIO_SPEED_VLOW, GPIO_PULL_DOWN, GPIO_AF_0, 0);
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hw_gpio_init(GPIO_ID_N64_CIC_DQ, GPIO_OUTPUT, GPIO_OD, GPIO_SPEED_VLOW, GPIO_PULL_UP, GPIO_AF_0, 1);
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@ -56,16 +56,6 @@ static void lcmxo2_reg_set (uint8_t reg, uint8_t value) {
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while (fpga_reg_get(REG_VENDOR_SCR) & VENDOR_SCR_BUSY);
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}
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static uint8_t lcmxo2_reg_get (uint8_t reg) {
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fpga_reg_set(REG_VENDOR_SCR,
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(reg << VENDOR_SCR_ADDRESS_BIT) |
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(0 << VENDOR_SCR_LENGTH_BIT) |
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VENDOR_SCR_START
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);
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while (fpga_reg_get(REG_VENDOR_SCR) & VENDOR_SCR_BUSY);
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return fpga_reg_get(REG_VENDOR_DATA) & 0xFF;
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}
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static void lcmxo2_reset_bus (void) {
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lcmxo2_reg_set(LCMXO2_CFGCR, CFGCR_RSTE);
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lcmxo2_reg_set(LCMXO2_CFGCR, 0);
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@ -91,14 +81,41 @@ static void lcmxo2_cleanup (void) {
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}
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static void lcmxo2_read_data (uint8_t *buffer, uint32_t length) {
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for (uint32_t i = 0; i < length; i++) {
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*buffer++ = lcmxo2_reg_get(LCMXO2_CFGRXDR);
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while (length > 0) {
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uint32_t block_size = (length > 4) ? 4 : length;
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fpga_reg_set(REG_VENDOR_SCR,
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(LCMXO2_CFGRXDR << VENDOR_SCR_ADDRESS_BIT) |
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((block_size - 1) << VENDOR_SCR_LENGTH_BIT) |
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VENDOR_SCR_START
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);
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while (fpga_reg_get(REG_VENDOR_SCR) & VENDOR_SCR_BUSY);
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uint32_t data = fpga_reg_get(REG_VENDOR_DATA);
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data <<= ((4 - block_size) * 8);
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for (int i = 0; i < block_size; i++) {
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*buffer++ = ((data >> 24) & 0xFF);
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data <<= 8;
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length -= 1;
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}
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}
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}
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static void lcmxo2_write_data (uint8_t *buffer, uint32_t length) {
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for (uint32_t i = 0; i < length; i++) {
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lcmxo2_reg_set(LCMXO2_CFGTXDR, *buffer++);
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while (length > 0) {
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uint32_t block_size = (length > 4) ? 4 : length;
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uint32_t data = 0;
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for (int i = 0; i < block_size; i++) {
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data = ((data << 8) | *buffer++);
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length -= 1;
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}
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data <<= ((4 - block_size) * 8);
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fpga_reg_set(REG_VENDOR_DATA, data);
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fpga_reg_set(REG_VENDOR_SCR,
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(LCMXO2_CFGTXDR << VENDOR_SCR_ADDRESS_BIT) |
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((block_size - 1) << VENDOR_SCR_LENGTH_BIT) |
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VENDOR_SCR_WRITE |
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VENDOR_SCR_START
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);
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while (fpga_reg_get(REG_VENDOR_SCR) & VENDOR_SCR_BUSY);
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}
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}
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@ -9,12 +9,9 @@
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typedef enum {
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UPDATE_STATUS_START = 1,
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UPDATE_STATUS_MCU_START = 2,
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UPDATE_STATUS_MCU_DONE = 3,
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UPDATE_STATUS_FPGA_START = 4,
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UPDATE_STATUS_FPGA_DONE = 5,
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UPDATE_STATUS_DONE = 6,
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UPDATE_STATUS_MCU = 1,
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UPDATE_STATUS_FPGA = 2,
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UPDATE_STATUS_DONE = 0x80,
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UPDATE_STATUS_ERROR = 0xFF,
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} update_status_t;
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@ -30,25 +27,22 @@ static const uint8_t update_token[16] = "SC64 Update v2.0";
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static uint8_t status_data[12] = {
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'P', 'K', 'T', PACKET_CMD_UPDATE_STATUS,
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0, 0, 0, 4,
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0, 0, 0, UPDATE_STATUS_START,
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0, 0, 0, UPDATE_STATUS_ERROR,
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};
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static uint32_t update_checksum (uint32_t address, uint32_t length) {
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uint32_t remaining = length;
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uint8_t buffer[32];
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uint32_t block_size;
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uint32_t checksum = 0;
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uint8_t buffer[32];
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hw_crc32_reset();
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for (uint32_t i = 0; i < length; i += sizeof(buffer)) {
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block_size = (remaining > sizeof(buffer)) ? sizeof(buffer) : remaining;
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while (length > 0) {
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block_size = (length > sizeof(buffer)) ? sizeof(buffer) : length;
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fpga_mem_read(address, block_size, buffer);
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checksum = hw_crc32_calculate(buffer, block_size);
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remaining -= block_size;
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address += block_size;
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length -= block_size;
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}
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return checksum;
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}
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@ -91,6 +85,7 @@ static bool update_get_chunk (uint32_t *address, chunk_id_t *chunk_id, uint32_t
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uint32_t id;
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uint32_t checksum;
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fpga_mem_read(*address, sizeof(id), (uint8_t *) (&id));
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*chunk_id = (chunk_id_t) (id);
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*address += sizeof(id);
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fpga_mem_read(*address, sizeof(*data_length), (uint8_t *) (data_length));
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*address += sizeof(*data_length);
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@ -120,11 +115,13 @@ static void update_status_notify (update_status_t status) {
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fpga_usb_push(status_data[i]);
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}
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fpga_reg_set(REG_USB_SCR, USB_SCR_WRITE_FLUSH);
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if (status != UPDATE_STATUS_ERROR) {
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update_blink_led(100, 250, status);
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hw_delay_ms(1000);
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} else {
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if (status == UPDATE_STATUS_DONE) {
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update_blink_led(15, 85, 10);
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} else if (status == UPDATE_STATUS_ERROR) {
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update_blink_led(1000, 1000, 30);
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} else {
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update_blink_led(15, 185, 2);
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hw_delay_ms(500);
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}
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}
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@ -134,7 +131,7 @@ update_error_t update_backup (uint32_t address, uint32_t *length) {
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uint32_t mcu_length;
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uint32_t fpga_length;
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*length += update_write_token(&address);
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*length = update_write_token(&address);
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*length += update_prepare_chunk(&address, CHUNK_ID_MCU_DATA);
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mcu_length = hw_flash_size();
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@ -214,35 +211,25 @@ bool update_check (void) {
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void update_perform (void) {
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hw_flash_t buffer;
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update_status_notify(UPDATE_STATUS_START);
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if (parameters.mcu_length != 0) {
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update_status_notify(UPDATE_STATUS_MCU_START);
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update_status_notify(UPDATE_STATUS_MCU);
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hw_flash_erase();
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for (uint32_t offset = 0; offset < parameters.mcu_length; offset += sizeof(hw_flash_t)) {
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fpga_mem_read(parameters.mcu_address + offset, sizeof(hw_flash_t), (uint8_t *) (&buffer));
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hw_flash_program(offset, buffer);
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if (hw_flash_read(offset) != buffer) {
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update_status_notify(UPDATE_STATUS_ERROR);
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while (1); // TODO: jump to STM32 bootloader?
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while (1);
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}
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}
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update_status_notify(UPDATE_STATUS_MCU_DONE);
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}
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if (parameters.fpga_length != 0) {
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update_status_notify(UPDATE_STATUS_FPGA_START);
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update_status_notify(UPDATE_STATUS_FPGA);
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if (vendor_update(parameters.fpga_address, parameters.fpga_length) != VENDOR_OK) {
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update_status_notify(UPDATE_STATUS_ERROR);
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while (1); // TODO: jump to STM32 bootloader?
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while (1);
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}
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update_status_notify(UPDATE_STATUS_FPGA_DONE);
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}
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update_status_notify(UPDATE_STATUS_DONE);
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