diff --git a/fw/SummerCart64.qsf b/fw/SummerCart64.qsf
index 8135ea3..ef2aaa0 100644
--- a/fw/SummerCart64.qsf
+++ b/fw/SummerCart64.qsf
@@ -77,7 +77,6 @@ set_global_assignment -name VERILOG_FILE rtl/top.v
 set_global_assignment -name VERILOG_FILE rtl/usb/usb_ftdi_fsi.v
 set_global_assignment -name VERILOG_FILE rtl/usb/usb_pc.v
 set_global_assignment -name VERILOG_INCLUDE_FILE rtl/constants.vh
-set_global_assignment -name SLD_FILE db/signal_tap_logic_analyzer_auto_stripped.stp
 
 # Pin & Location Assignments
 # ==========================
@@ -273,10 +272,11 @@ set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -
 		set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
 		set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
 		set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
-		set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
 
 	# end DESIGN_PARTITION(Top)
 	# -------------------------
 
 # end ENTITY(top)
-# ---------------
\ No newline at end of file
+# ---------------
+set_global_assignment -name SLD_FILE db/signal_tap_logic_analyzer_auto_stripped.stp
+set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
\ No newline at end of file
diff --git a/fw/rtl/sd/sd_interface.v b/fw/rtl/sd/sd_interface.v
index 16c5742..222495f 100644
--- a/fw/rtl/sd/sd_interface.v
+++ b/fw/rtl/sd/sd_interface.v
@@ -100,7 +100,7 @@ module sd_interface (
         .i_fifo_pop(w_rx_fifo_regs_pop || w_rx_fifo_dma_pop),
         .o_fifo_empty(w_rx_fifo_empty),
         .o_fifo_full(w_rx_fifo_full),
-        .o_fifo_underrun(),
+        .o_fifo_underrun(1'bZ),
         .o_fifo_overrun(w_rx_fifo_overrun),
         .o_fifo_items(w_rx_fifo_items),
         .i_fifo_data(w_rx_fifo_i_data),
@@ -140,7 +140,7 @@ module sd_interface (
         .o_fifo_empty(w_tx_fifo_empty),
         .o_fifo_full(w_tx_fifo_full),
         .o_fifo_underrun(w_tx_fifo_underrun),
-        .o_fifo_overrun(),
+        .o_fifo_overrun(1'bZ),
         .o_fifo_items(w_tx_fifo_items),
         .i_fifo_data(r_tx_fifo_i_data),
         .o_fifo_data(w_tx_fifo_o_data)
diff --git a/fw/rtl/usb/usb_pc.v b/fw/rtl/usb/usb_pc.v
index 672cf2a..d4a59db 100644
--- a/fw/rtl/usb/usb_pc.v
+++ b/fw/rtl/usb/usb_pc.v
@@ -54,6 +54,7 @@ module usb_pc (
 
         .i_rx_ready(r_ftdi_rx_ready),
         .o_rx_valid(w_ftdi_rx_valid),
+        .o_rx_channel(1'bZ),
         .o_rx_data(w_ftdi_rx_data),
 
         .o_tx_busy(w_ftdi_tx_busy),
@@ -298,7 +299,8 @@ module usb_pc (
             TX_STAGE_DATA: begin
                 case (r_tx_cmd)
                     CMD_IDENTIFY: r_ftdi_tx_data = IDENTIFY_STRING[r_tx_byte_counter];
-                    CMD_DEBUG_SEND: r_ftdi_tx_data = r_i_data_buffer[(((4 - r_tx_byte_counter) * 8) - 1) -: 8];
+                    CMD_DEBUG_SEND: r_ftdi_tx_data = r_i_data_buffer[(((4 - {2'b00, r_tx_byte_counter}) * 8) - 1) -: 8];
+                    default: begin end
                 endcase
             end
 
@@ -306,6 +308,8 @@ module usb_pc (
                 if (r_tx_byte_counter != 2'd3) r_ftdi_tx_data = RSP_COMPLETE[r_tx_byte_counter];
                 else r_ftdi_tx_data = r_tx_cmd;
             end
+
+            default: begin end
         endcase
     end