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[SC64][SW] Added very basic SDRAM test in the primer before flashing bootloader
This commit is contained in:
Mateusz Faderewski
parent
f27f644a7e
commit
c156b72bee
@ -6,7 +6,9 @@
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- [**Putting it together**](#putting-it-together)
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- [**Initial programming**](#initial-programming)
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- [**Troubleshooting**](#troubleshooting)
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- [*`primer.py` threw error on `Bootloader -> SC64 FLASH` step*](#primerpy-threw-error-on-bootloader---sc64-flash-step)
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- [*`primer.py` threw `No SC64 USB device found` error*](#primerpy-threw-no-sc64-usb-device-found-error)
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- [*`primer.py` threw `SDRAM test error...` message*](#primerpy-threw-sdram-test-error-message)
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- [*`primer.py` threw other error message*](#primerpy-threw-other-error-message)
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---
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@ -115,9 +117,23 @@ Congratulations! Your SC64 flashcart should be ready for use!
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### **Troubleshooting**
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#### *`primer.py` threw error on `Bootloader -> SC64 FLASH` step*
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#### *`primer.py` threw `No SC64 USB device found` error*
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This issue can be attributed to incorrectly programmed FT232H EEPROM in the first programming step.
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Check again in `FT_PROG` application if device was configured properly.
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Make sure default FTDI drivers are installed for the SC64 in the device manager (only on Windows OS).
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Make sure you have correct access to `/dev/ttyUSBx` device and `ftdi_sio` and `usbserial` modules are loaded (only on Linux OS).
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#### *`primer.py` threw `SDRAM test error...` message*
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This issue shows up when there's a problem with the connection to the SDRAM chip or the chip itself is malfunctioning.
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Check for any solder bridges and unconnected pins on U8/U9 chips.
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Once FPGA and microcontroller has been programmed successfully `primer.py` script needs to be run in special mode.
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Please use command `python3 primer.py COMx sc64-firmware-{version}.bin --bootloader-only` to try programming bootloader again.
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Please use command `python3 primer.py COMx sc64-firmware-{version}.bin --bootloader-only` to test SDRAM again and continue bootloader programming process.
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#### *`primer.py` threw other error message*
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Due to multiple possible causes of the problem it's best to start visually inspecting SC64's board for any defects, like bad solder work or chips soldered backwards.
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If visual inspection didn't yield any obvious culprits then next step would be to check if everything is connected correctly.
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Check if TX/RX signals aren't swapped and if SC64 is getting power from the USB cable. Best place to check supply voltage are the exposed test pads on the left of U8 chip.
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If everything at this point was checked and looked fine, then feel free to open new thread in the [*Discussions*](https://github.com/Polprzewodnikowy/SummerCart64/discussions) tab.
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Make sure to describe your problem extensively, attach SC64 board photos **from the both sides**, and paste all logs/screenshots from the `primer.py` output.
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@ -5,10 +5,11 @@ import os
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import queue
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import serial
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import signal
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import struct
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import sys
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import time
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from binascii import crc32
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from enum import IntEnum
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from enum import IntEnum, StrEnum
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from serial.tools import list_ports
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from sys import exit
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from typing import Callable, Optional
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@ -478,6 +479,8 @@ class SC64:
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__serial: Optional[serial.Serial] = None
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__packets = queue.Queue()
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SDRAM_SIZE = 64 * 1024 * 1024
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class __UpdateStatus(IntEnum):
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MCU = 1
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FPGA = 2
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@ -485,7 +488,8 @@ class SC64:
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DONE = 0x80
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ERROR = 0xFF
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def __init__(self) -> None:
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def __init__(self, progress: Callable[[int, int, str], None]) -> None:
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self.__progress = progress
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SC64_VID = 0x0403
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SC64_PID = 0x6014
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SC64_SID = "SC64"
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@ -575,14 +579,36 @@ class SC64:
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return packet
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return None
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def update_firmware(self, data: bytes) -> None:
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def __cmd_state_reset(self) -> None:
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self.__execute_command(b'R')
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def __cmd_memory_read(self, address: int, length: int) -> bytes:
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return self.__execute_command(b'm', [address, length])
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def __cmd_memory_write(self, address: int, data: bytes) -> None:
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self.__execute_command(b'M', [address, len(data)], data)
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def __cmd_firmware_update(self, address: int, length: int) -> None:
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self.__execute_command(b'F', [address, length])
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def update_firmware(self, data: bytes, description: str) -> None:
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FIRMWARE_ADDRESS = 0x00100000
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FIRMWARE_UPDATE_TIMEOUT = 90.0
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STEPS = 6
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self.__progress(STEPS, 0, description)
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self.__reset()
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self.__execute_command(b'R')
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self.__execute_command(b'M', [FIRMWARE_ADDRESS, len(data)], data)
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self.__execute_command(b'F', [FIRMWARE_ADDRESS, len(data)])
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self.__progress(STEPS, 1, description)
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self.__cmd_state_reset()
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self.__progress(STEPS, 2, description)
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self.__cmd_memory_write(FIRMWARE_ADDRESS, data)
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self.__progress(STEPS, 3, description)
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self.__cmd_firmware_update(FIRMWARE_ADDRESS, len(data))
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self.__progress(STEPS, 4, description)
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timeout = time.time() + FIRMWARE_UPDATE_TIMEOUT
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while True:
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@ -596,11 +622,62 @@ class SC64:
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if (id != b'F'):
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raise SC64Exception('Unexpected packet id received')
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status = self.__UpdateStatus(int.from_bytes(packet_data[0:4], byteorder='big'))
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if (status == self.__UpdateStatus.ERROR):
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raise SC64Exception('Firmware update error')
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if (status == self.__UpdateStatus.DONE):
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if (status == self.__UpdateStatus.BOOTLOADER):
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self.__progress(STEPS, 5, description)
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elif (status == self.__UpdateStatus.DONE):
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self.__progress(STEPS, 6, description)
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time.sleep(2)
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break
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elif (status == self.__UpdateStatus.ERROR):
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raise SC64Exception('Firmware update error')
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class __RamTestPattern(StrEnum):
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OWN_ADDRESS = 'own address'
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ALL_ZEROS = 'all zeros'
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ALL_ONES = 'all ones'
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RANDOM_DATA = 'random data'
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def __create_ram_test_pattern(self, pattern: __RamTestPattern) -> bytes:
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if (pattern == self.__RamTestPattern.OWN_ADDRESS):
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addresses = list(range(0, self.SDRAM_SIZE, 4))
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data = struct.pack(f'>{len(addresses)}I', *addresses)
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elif (pattern == self.__RamTestPattern.ALL_ZEROS):
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data = b'\x00' * self.SDRAM_SIZE
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elif (pattern == self.__RamTestPattern.ALL_ONES):
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data = b'\xFF' * self.SDRAM_SIZE
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elif (pattern == self.__RamTestPattern.RANDOM_DATA):
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data = os.urandom(self.SDRAM_SIZE)
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return bytes(data)
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def sdram_test(self, description: str) -> None:
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CHUNK_LENGTH = 1 * 1024 * 1024
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self.__reset()
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self.__cmd_state_reset()
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for pattern in self.__RamTestPattern:
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write_description = f'{description} / Write {pattern.value}'
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check_description = f'{description} / Check {pattern.value}'
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test_data = self.__create_ram_test_pattern(pattern)
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self.__progress(self.SDRAM_SIZE, 0, write_description)
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for offset in range(0, self.SDRAM_SIZE, CHUNK_LENGTH):
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self.__cmd_memory_write(offset, test_data[offset:offset+CHUNK_LENGTH])
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self.__progress(self.SDRAM_SIZE, offset + CHUNK_LENGTH, write_description)
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self.__progress(self.SDRAM_SIZE, 0, check_description)
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for offset in range(0, self.SDRAM_SIZE, CHUNK_LENGTH):
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check_data = self.__cmd_memory_read(offset, CHUNK_LENGTH)
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if (check_data != test_data[offset:offset+CHUNK_LENGTH]):
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for chunk_offset in range(0, CHUNK_LENGTH, 4):
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test_address = offset + chunk_offset
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expected_value = int.from_bytes(test_data[test_address:test_address+4], byteorder='big')
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read_value = int.from_bytes(check_data[chunk_offset:chunk_offset+4], byteorder='big')
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if (read_value != expected_value or test_address == 0x00100000):
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raise SC64Exception(f'SDRAM test error at 0x{test_address:08X}: read 0x{read_value:08X} != expected 0x{expected_value:08X}')
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self.__progress(self.SDRAM_SIZE, offset + CHUNK_LENGTH, check_description)
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class SC64BringUp:
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@ -621,7 +698,7 @@ class SC64BringUp:
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def start_bring_up(self, port: str, bootloader_only: bool=False) -> None:
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link = None
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sc64 = SC64()
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sc64 = SC64(self.__progress)
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try:
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if (not bootloader_only):
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@ -651,11 +728,8 @@ class SC64BringUp:
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time.sleep(self.__INTERVAL_TIME)
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link.read_all()
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bootloader_description = 'Bootloader -> SC64 FLASH (no progress reporting)'
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bootloader_length = len(self.__bootloader_only_firmware)
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self.__progress(bootloader_length, 0, bootloader_description)
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sc64.update_firmware(self.__bootloader_only_firmware)
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self.__progress(bootloader_length, bootloader_length, bootloader_description)
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sc64.sdram_test('SC64 SDRAM test')
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sc64.update_firmware(self.__bootloader_only_firmware, 'Bootloader -> SC64 FLASH')
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finally:
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if (link and link.is_open):
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link.close()
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