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PI access prioritize

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Polprzewodnikowy 2022-09-29 02:07:52 +02:00
parent 0a06fd26a5
commit c475b62197
4 changed files with 32 additions and 6 deletions
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14
fw/rtl/memory/memory_arbiter.sv
View File

@ -2,6 +2,8 @@ module memory_arbiter (
input clk,
input reset,
n64_scb.arbiter n64_scb,
mem_bus.memory n64_bus,
mem_bus.memory cfg_bus,
mem_bus.memory usb_dma_bus,
@ -35,14 +37,14 @@ module memory_arbiter (
logic sd_dma_bram_request;
assign n64_sdram_request = n64_bus.request && !n64_bus.address[26];
assign cfg_sdram_request = cfg_bus.request && !cfg_bus.address[26];
assign usb_dma_sdram_request = usb_dma_bus.request && !usb_dma_bus.address[26];
assign sd_dma_sdram_request = sd_dma_bus.request && !sd_dma_bus.address[26];
assign cfg_sdram_request = !n64_scb.pi_sdram_active && cfg_bus.request && !cfg_bus.address[26];
assign usb_dma_sdram_request = !n64_scb.pi_sdram_active && usb_dma_bus.request && !usb_dma_bus.address[26];
assign sd_dma_sdram_request = !n64_scb.pi_sdram_active && sd_dma_bus.request && !sd_dma_bus.address[26];
assign n64_flash_request = n64_bus.request && (n64_bus.address[26:24] == 3'b100);
assign cfg_flash_request = cfg_bus.request && (cfg_bus.address[26:24] == 3'b100);
assign usb_dma_flash_request = usb_dma_bus.request && (usb_dma_bus.address[26:24] == 3'b100);
assign sd_dma_flash_request = sd_dma_bus.request && (sd_dma_bus.address[26:24] == 3'b100);
assign cfg_flash_request = !n64_scb.pi_flash_active && cfg_bus.request && (cfg_bus.address[26:24] == 3'b100);
assign usb_dma_flash_request = !n64_scb.pi_flash_active && usb_dma_bus.request && (usb_dma_bus.address[26:24] == 3'b100);
assign sd_dma_flash_request = !n64_scb.pi_flash_active && sd_dma_bus.request && (sd_dma_bus.address[26:24] == 3'b100);
assign n64_bram_request = n64_bus.request && (n64_bus.address[26:24] >= 3'b101);
assign cfg_bram_request = cfg_bus.request && (cfg_bus.address[26:24] >= 3'b101);

13
fw/rtl/n64/n64_pi.sv
View File

@ -134,6 +134,11 @@ module n64_pi (
logic [31:0] mem_offset;
always_ff @(posedge clk) begin
if (reset || !pi_reset || end_op) begin
n64_scb.pi_sdram_active <= 1'b0;
n64_scb.pi_flash_active <= 1'b0;
end
if (reset) begin
read_port <= PORT_NONE;
write_port <= PORT_NONE;
@ -161,6 +166,7 @@ module n64_pi (
read_port <= PORT_MEM;
write_port <= PORT_NONE;
mem_offset <= (-32'h0600_0000) + DDIPL_OFFSET;
n64_scb.pi_sdram_active <= 1'b1;
end
end
@ -172,6 +178,7 @@ module n64_pi (
reg_bus.flashram_select <= 1'b1;
if (n64_scb.flashram_read_mode) begin
read_port <= PORT_MEM;
n64_scb.pi_sdram_active <= 1'b1;
end
end
end else if (n64_scb.sram_enabled) begin
@ -181,6 +188,7 @@ module n64_pi (
read_port <= PORT_MEM;
write_port <= PORT_MEM;
mem_offset <= (-32'h0800_0000) - {n64_pi_dq_in[3:2], 18'd0} + {n64_pi_dq_in[3:2], 15'd0} + SAVE_OFFSET;
n64_scb.pi_sdram_active <= 1'b1;
end
end
end else begin
@ -188,6 +196,7 @@ module n64_pi (
read_port <= PORT_MEM;
write_port <= PORT_MEM;
mem_offset <= (-32'h0800_0000) + SAVE_OFFSET;
n64_scb.pi_sdram_active <= 1'b1;
end
end
end
@ -197,12 +206,14 @@ module n64_pi (
read_port <= PORT_MEM;
write_port <= PORT_NONE;
mem_offset <= (-32'h1000_0000) + BOOTLOADER_OFFSET;
n64_scb.pi_flash_active <= 1'b1;
end
end else begin
if (n64_pi_dq_in >= 16'h1000 && n64_pi_dq_in < 16'h1400) begin
read_port <= PORT_MEM;
write_port <= n64_scb.rom_write_enabled ? PORT_MEM : PORT_NONE;
mem_offset <= (-32'h1000_0000);
n64_scb.pi_sdram_active <= 1'b1;
end
end
@ -211,6 +222,7 @@ module n64_pi (
read_port <= PORT_MEM;
write_port <= PORT_NONE;
mem_offset <= (-32'h13FE_0000) + SHADOW_OFFSET;
n64_scb.pi_flash_active <= 1'b1;
end
end
@ -219,6 +231,7 @@ module n64_pi (
read_port <= PORT_MEM;
write_port <= PORT_NONE;
mem_offset <= (-32'h1400_0000) + FLASH_OFFSET;
n64_scb.pi_flash_active <= 1'b1;
end
end

9
fw/rtl/n64/n64_scb.sv
View File

@ -51,6 +51,8 @@ interface n64_scb ();
logic [31:0] cfg_wdata [0:1];
logic [31:0] cfg_version;
logic pi_sdram_active;
logic pi_flash_active;
logic [3:0] pi_debug;
modport controller (
@ -111,6 +113,8 @@ interface n64_scb ();
input cfg_unlock,
output pi_sdram_active,
output pi_flash_active,
output pi_debug
);
@ -185,4 +189,9 @@ interface n64_scb ();
input cfg_version
);
modport arbiter (
input pi_sdram_active,
input pi_flash_active
);
endinterface

2
fw/rtl/top.sv
View File

@ -202,6 +202,8 @@ module top (
.clk(clk),
.reset(reset),
.n64_scb(n64_scb),
.n64_bus(n64_mem_bus),
.cfg_bus(cfg_mem_bus),
.usb_dma_bus(usb_dma_mem_bus),