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make room for saves

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Polprzewodnikowy 2021-12-27 01:50:00 +01:00
parent 4b888d0f71
commit d38cf33c58
3 changed files with 12 additions and 10 deletions
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4
sw/pc/sc64.py
View File

@ -829,9 +829,9 @@ if __name__ == "__main__":
print(f"Setting 64DD disk state to [Changed]")
sc64.set_dd_disk_state("changed" if disk_file else "ejected")
if (is_viewer_enabled):
print(f"Setting IS-Viewer64 emulation to [Enabled]")
print(f"Setting IS-Viewer 64 emulation to [Enabled]")
sc64.debug_init(sd_file, disk_file, is_viewer_enabled)
sc64.debug_loop(is_viewer_enabled)
sc64.debug_loop()
except SC64Exception as e:
print(f"Error: {e}")

16
sw/riscv/src/cfg.c
View File

@ -12,10 +12,12 @@
#define SAVE_SIZE_FLASHRAM (128 * 1024)
#define SAVE_SIZE_SRAM_BANKED (3 * 32 * 1024)
#define ISV_SIZE (64 * 1024)
#define SAVE_OFFSET_PKST2 (0x01608000UL)
#define DEFAULT_SAVE_OFFSET (0x03FE0000UL)
#define DEFAULT_DDIPL_OFFSET (0x03BE0000UL)
#define DEFAULT_SAVE_OFFSET (0x03FD0000UL)
#define DEFAULT_DDIPL_OFFSET (0x03BD0000UL)
enum cfg_id {
@ -85,23 +87,23 @@ static void set_save_type (enum save_type save_type) {
case SAVE_TYPE_NONE:
break;
case SAVE_TYPE_EEPROM_4K:
save_offset = SDRAM_SIZE - SAVE_SIZE_EEPROM_4K;
save_offset = SDRAM_SIZE - SAVE_SIZE_EEPROM_4K - ISV_SIZE;
joybus_set_eeprom(EEPROM_4K);
break;
case SAVE_TYPE_EEPROM_16K:
save_offset = SDRAM_SIZE - SAVE_SIZE_EEPROM_16K;
save_offset = SDRAM_SIZE - SAVE_SIZE_EEPROM_16K - ISV_SIZE;
joybus_set_eeprom(EEPROM_16K);
break;
case SAVE_TYPE_SRAM:
save_offset = SDRAM_SIZE - SAVE_SIZE_SRAM;
save_offset = SDRAM_SIZE - SAVE_SIZE_SRAM - ISV_SIZE;
change_scr_bits(CFG_SCR_SRAM_EN, true);
break;
case SAVE_TYPE_FLASHRAM:
save_offset = SDRAM_SIZE - SAVE_SIZE_FLASHRAM;
save_offset = SDRAM_SIZE - SAVE_SIZE_FLASHRAM - ISV_SIZE;
change_scr_bits(CFG_SCR_FLASHRAM_EN, true);
break;
case SAVE_TYPE_SRAM_BANKED:
save_offset = SDRAM_SIZE - SAVE_SIZE_SRAM_BANKED;
save_offset = SDRAM_SIZE - SAVE_SIZE_SRAM_BANKED - ISV_SIZE;
change_scr_bits(CFG_SCR_SRAM_BANKED | CFG_SCR_SRAM_EN, true);
break;
case SAVE_TYPE_FLASHRAM_PKST2:

2
sw/riscv/src/dd.c
View File

@ -5,7 +5,7 @@
#define DD_USER_SECTORS_PER_BLOCK (85)
#define DD_BUFFERS_OFFSET (SDRAM_BASE + 0x03BD0000UL)
#define DD_BUFFERS_OFFSET (SDRAM_BASE + 0x03BC0000UL)
#define DD_THB_TABLE_OFFSET (DD_BUFFERS_OFFSET + 0x0000)
#define DD_USB_BUFFER_OFFSET (DD_BUFFERS_OFFSET + 0x5000)
#define DD_BLOCK_BUFFER_OFFSET (DD_USB_BUFFER_OFFSET + 0x10)