mirror of
https://github.com/Polprzewodnikowy/SummerCart64.git
synced 2024-12-27 05:21:55 +01:00
little sd card cleanup
This commit is contained in:
Polprzewodnikowy
parent
321f3d37aa
commit
e6866e8fe0
@ -29,8 +29,8 @@ SRC_FILES = \
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io.c \
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ipl2.S \
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main.c \
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menu.c \
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sc64.c \
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storage.c \
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syscalls.c \
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test.c \
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version.c \
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@ -4,7 +4,11 @@
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#include "../sc64.h"
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#include "../error.h"
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DSTATUS status = STA_NOINIT;
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#define FROM_BCD(x) ((((x >> 4) & 0x0F) * 10) + (x & 0x0F))
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static DSTATUS status = STA_NOINIT;
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DSTATUS disk_status (BYTE pdrv) {
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@ -18,7 +22,7 @@ DSTATUS disk_initialize (BYTE pdrv) {
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if (pdrv > 0) {
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return STA_NODISK;
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}
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if (!sc64_sd_card_initialize()) {
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if (!sc64_sd_card_init()) {
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status &= ~(STA_NOINIT);
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}
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return status;
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@ -28,67 +32,61 @@ DRESULT disk_read (BYTE pdrv, BYTE *buff, LBA_t sector, UINT count) {
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if (pdrv > 0) {
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return RES_PARERR;
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}
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uint32_t physical_address = ((uint32_t) (buff)) & 0x1FFFFFFF;
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uint32_t block = 0;
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while (count > 0) {
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if (physical_address < (8 * 1024 * 1024)) {
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block = ((count > 16) ? 16 : count);
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if (sc64_sd_read_sectors(sector, 0x1FFE0000UL, block * 512)) {
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uint32_t *physical_address = (uint32_t *) (PHYSICAL(buff));
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if (physical_address < (uint32_t *) (N64_RAM_SIZE)) {
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while (count > 0) {
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uint32_t block = ((count > 16) ? 16 : count);
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if (sc64_sd_read_sectors((uint32_t *) (SC64_BUFFERS->BUFFER), sector, block)) {
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return RES_ERROR;
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}
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for (uint32_t i = 0; i < (block * 512); i += 4) {
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uint32_t data = pi_io_read((uint32_t *) (0x1FFE0000UL + i));
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// TODO: use dma
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uint32_t data = pi_io_read((uint32_t *) (&SC64_BUFFERS->BUFFER[i]));
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uint8_t *ptr = (uint8_t *) (&data);
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for (int j = 0; j < 4; j++) {
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*buff++ = *ptr++;
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}
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}
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} else {
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block = ((count > 256) ? 256 : count);
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if (sc64_sd_read_sectors(sector, physical_address, block * 512)) {
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error_display("Kurwa 0x%08X, 0x%08X\n", physical_address, block);
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return RES_ERROR;
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}
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physical_address += (block * 512);
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count -= block;
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sector += block;
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}
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} else {
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if (sc64_sd_read_sectors(physical_address, sector, count)) {
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return RES_ERROR;
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}
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count -= block;
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sector += block;
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}
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return RES_OK;
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}
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#if !FF_FS_READONLY
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DRESULT disk_write (BYTE pdrv, const BYTE* buff, LBA_t sector, UINT count) {
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// if (pdrv >= __DRIVE_COUNT) {
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// return RES_PARERR;
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// }
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// if (sc64_storage_write((drive_id_t) (pdrv), buff, sector, count)) {
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return RES_ERROR;
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// }
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// return RES_OK;
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if (pdrv > 0) {
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return RES_PARERR;
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}
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// TODO: write
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return RES_ERROR;
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}
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#endif
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DRESULT disk_ioctl (BYTE pdrv, BYTE cmd, void *buff) {
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if (pdrv > 0) {
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return RES_PARERR;
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}
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if (cmd == CTRL_SYNC) {
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return RES_OK;
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}
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return RES_PARERR;
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}
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static uint8_t from_bcd (uint8_t bcd) {
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return ((((bcd >> 4) & 0x0F) * 10) + (bcd & 0x0F));
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}
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DWORD get_fattime(void) {
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rtc_time_t t;
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sc64_get_time(&t);
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return (
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((from_bcd(t.year) + 20) << 25) |
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(from_bcd(t.month) << 21) |
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(from_bcd(t.day) << 16) |
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(from_bcd(t.hour) << 11) |
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(from_bcd(t.minute) << 5) |
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(from_bcd(t.second) >> 1)
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((FROM_BCD(t.year) + 20) << 25) |
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(FROM_BCD(t.month) << 21) |
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(FROM_BCD(t.day) << 16) |
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(FROM_BCD(t.hour) << 11) |
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(FROM_BCD(t.minute) << 5) |
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(FROM_BCD(t.second) >> 1)
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);
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}
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@ -12,8 +12,11 @@ typedef volatile uint32_t io32_t;
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#define ALIGN(value, align) (((value) + ((typeof(value))(align) - 1)) & ~((typeof(value))(align) - 1))
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#define PHYSICAL(address) ((typeof(address)) (((io32_t) (address)) & (0x1FFFFFFFUL)))
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#define UNCACHED(address) ((typeof(address)) (((io32_t) (address)) | (0xA0000000UL)))
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#define N64_RAM_SIZE (0x00800000UL)
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typedef struct {
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io32_t DMEM[1024];
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@ -2,8 +2,8 @@
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#include "error.h"
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#include "init.h"
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#include "io.h"
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#include "menu.h"
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#include "sc64.h"
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#include "storage.h"
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void main (void) {
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@ -13,12 +13,8 @@ void main (void) {
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sc64_get_boot_info(&sc64_boot_info);
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switch (sc64_boot_info.boot_mode) {
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case BOOT_MODE_MENU_SD:
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storage_run_menu(STORAGE_BACKEND_SD);
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break;
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case BOOT_MODE_MENU_USB:
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storage_run_menu(STORAGE_BACKEND_USB);
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case BOOT_MODE_MENU:
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menu_load_and_run();
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break;
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case BOOT_MODE_ROM:
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@ -1,7 +1,7 @@
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#include "error.h"
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#include "init.h"
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#include "storage.h"
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#include "fatfs/ff.h"
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#include "init.h"
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#include "menu.h"
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#define ROM_ENTRY_OFFSET (8)
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@ -41,28 +41,16 @@ static const char *fatfs_error_codes[] = {
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}
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void storage_run_menu (storage_backend_t storage_backend) {
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void menu_load_and_run (void) {
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void (* menu)(void);
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FRESULT fresult;
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FATFS fs;
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FIL fil;
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UINT br;
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FSIZE_t size = ROM_MAX_LOAD_SIZE;
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const TCHAR *path = "";
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if (storage_backend == STORAGE_BACKEND_SD) {
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path = "0:";
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} else if (storage_backend == STORAGE_BACKEND_USB) {
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path = "1:";
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} else {
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error_display("Unknown storage backend [%d]\n", storage_backend);
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}
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FF_CHECK(f_mount(&fs, path, 1), "Couldn't mount drive");
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FF_CHECK(f_chdrive(path), "Couldn't chdrive");
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FF_CHECK(f_mount(&fs, "", 1), "Couldn't mount drive");
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FF_CHECK(f_open(&fil, "sc64menu.n64", FA_READ), "Couldn't open menu file");
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FF_CHECK(f_lseek(&fil, 0), "debug 1");
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FF_CHECK(f_read(&fil, (void *) (0x10000000UL), f_size(&fil), &br), "debug 2");
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FF_CHECK(f_lseek(&fil, ROM_ENTRY_OFFSET), "Couldn't seek to entry point offset");
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FF_CHECK(f_read(&fil, &menu, sizeof(menu), &br), "Couldn't read entry point");
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FF_CHECK(f_lseek(&fil, ROM_CODE_OFFSET), "Couldn't seek to code start offset");
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@ -71,8 +59,11 @@ void storage_run_menu (storage_backend_t storage_backend) {
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}
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FF_CHECK(f_read(&fil, menu, size, &br), "Couldn't read menu file");
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FF_CHECK(br != size, "Read size is different than expected");
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FF_CHECK(f_lseek(&fil, 0), "Couldn't seek to the beginning of file");
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FF_CHECK(f_read(&fil, (void *) (0x10000000UL), f_size(&fil), &br), "Couldn't read file contents to SDRAM");
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FF_CHECK(f_close(&fil), "Couldn't close menu file");
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FF_CHECK(f_unmount(path), "Couldn't unmount drive");
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FF_CHECK(f_unmount(""), "Couldn't unmount drive");
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deinit();
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8
sw/bootloader/src/menu.h
Normal file
8
sw/bootloader/src/menu.h
Normal file
@ -0,0 +1,8 @@
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#ifndef MENU_H__
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#define MENU_H__
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void menu_load_and_run (void);
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#endif
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@ -15,7 +15,7 @@ typedef enum {
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SC64_CMD_USB_WRITE = 'M',
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SC64_CMD_USB_READ_STATUS = 'u',
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SC64_CMD_USB_READ = 'm',
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SC64_CMD_SD_CARD_INITIALIZE = 'i',
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SC64_CMD_SD_CARD_INIT = 'i',
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SC64_CMD_SD_SECTOR_SET = 'I',
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SC64_CMD_SD_READ = 's',
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SC64_CMD_SD_WRITE = 'S',
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@ -27,7 +27,7 @@ static bool sc64_wait_cpu_busy (void) {
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do {
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sr = pi_io_read(&SC64_REGS->SR_CMD);
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} while (sr & SC64_SR_CPU_BUSY);
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return sr & SC64_SR_CMD_ERROR;
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return (sr & SC64_SR_CMD_ERROR);
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}
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static bool sc64_execute_cmd (uint8_t cmd, uint32_t *args, uint32_t *result) {
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@ -126,7 +126,7 @@ bool sc64_usb_read_ready (uint8_t *type, uint32_t *length) {
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if (length != NULL) {
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*length = result[1];
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}
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return result[1] > 0;
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return (result[1] > 0);
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}
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bool sc64_usb_read (uint32_t *address, uint32_t length) {
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@ -141,16 +141,25 @@ bool sc64_usb_read (uint32_t *address, uint32_t length) {
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return false;
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}
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bool sc64_sd_card_initialize (void) {
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if (sc64_execute_cmd(SC64_CMD_SD_CARD_INITIALIZE, NULL, NULL)) {
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bool sc64_sd_card_init (void) {
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uint32_t args[2] = { 0, true };
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if (sc64_execute_cmd(SC64_CMD_SD_CARD_INIT, args, NULL)) {
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return true;
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}
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return false;
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}
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bool sc64_sd_read_sectors (uint32_t starting_sector, uint32_t address, uint32_t length) {
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uint32_t sector_set_args[2] = { starting_sector, 0 };
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uint32_t read_args[2] = { address, length };
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bool sc64_sd_card_deinit (void) {
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uint32_t args[2] = { 0, false };
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if (sc64_execute_cmd(SC64_CMD_SD_CARD_INIT, args, NULL)) {
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return true;
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}
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return false;
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}
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bool sc64_sd_read_sectors (uint32_t *address, uint32_t sector, uint32_t count) {
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uint32_t sector_set_args[2] = { sector, 0 };
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uint32_t read_args[2] = { (uint32_t) (address), count };
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if (sc64_execute_cmd(SC64_CMD_SD_SECTOR_SET, sector_set_args, NULL)) {
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return true;
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}
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@ -39,11 +39,10 @@ typedef enum {
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} dd_mode_t;
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typedef enum {
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BOOT_MODE_MENU_SD = 0,
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BOOT_MODE_MENU_USB = 1,
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BOOT_MODE_ROM = 2,
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BOOT_MODE_DDIPL = 3,
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BOOT_MODE_DIRECT = 4
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BOOT_MODE_MENU = 0,
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BOOT_MODE_ROM = 1,
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BOOT_MODE_DDIPL = 2,
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BOOT_MODE_DIRECT = 3
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} boot_mode_t;
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typedef enum {
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@ -104,8 +103,9 @@ bool sc64_usb_write_ready (void);
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bool sc64_usb_write (uint32_t *address, uint32_t length);
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bool sc64_usb_read_ready (uint8_t *type, uint32_t *length);
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bool sc64_usb_read (uint32_t *address, uint32_t length);
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bool sc64_sd_card_initialize (void);
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bool sc64_sd_read_sectors (uint32_t starting_sector, uint32_t address, uint32_t length);
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bool sc64_sd_card_init (void);
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bool sc64_sd_card_deinit (void);
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bool sc64_sd_read_sectors (uint32_t *address, uint32_t sector, uint32_t count);
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#endif
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@ -1,14 +0,0 @@
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#ifndef STORAGE_H__
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#define STORAGE_H__
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typedef enum {
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STORAGE_BACKEND_SD = 0,
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STORAGE_BACKEND_USB = 1,
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} storage_backend_t;
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void storage_run_menu (storage_backend_t storage_backend);
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#endif
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@ -35,11 +35,10 @@ typedef enum {
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} dd_mode_t;
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typedef enum {
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BOOT_MODE_MENU_SD = 0,
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BOOT_MODE_MENU_USB = 1,
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BOOT_MODE_ROM = 2,
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BOOT_MODE_DD = 3,
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BOOT_MODE_DIRECT = 4
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BOOT_MODE_MENU = 0,
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BOOT_MODE_ROM = 1,
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BOOT_MODE_DD = 2,
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BOOT_MODE_DIRECT = 3
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} boot_mode_t;
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typedef enum {
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@ -315,7 +314,7 @@ void cfg_init (void) {
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p.cic_seed = CIC_SEED_UNKNOWN;
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p.tv_type = TV_TYPE_UNKNOWN;
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p.boot_mode = BOOT_MODE_MENU_SD;
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p.boot_mode = BOOT_MODE_MENU;
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p.usb_output_ready = true;
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}
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@ -393,8 +392,12 @@ void cfg_process (void) {
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break;
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case 'i':
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if (sd_card_initialize()) {
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cfg_set_error(CFG_ERROR_SD);
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if (args[1]) {
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if (sd_card_init()) {
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cfg_set_error(CFG_ERROR_SD);
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}
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} else {
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sd_card_deinit();
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}
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break;
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@ -407,7 +410,7 @@ void cfg_process (void) {
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cfg_set_error(CFG_ERROR_BAD_ADDRESS);
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return;
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}
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if (sd_read_sectors(p.sd_card_sector, args[0], args[1])) {
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if (sd_read_sectors(args[0], p.sd_card_sector, args[1])) {
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cfg_set_error(CFG_ERROR_SD);
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}
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break;
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@ -55,6 +55,9 @@ typedef enum {
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} fpga_reg_t;
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#define SWAP16(x) (((x & 0xFF) << 8) | ((x & 0xFF00) >> 8))
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#define SWAP32(x) ((x & 0xFF) << 24 | (x & 0xFF00) << 8 | (x & 0xFF0000) >> 8 | (x & 0xFF000000) >> 24)
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#define FPGA_ID (0x64)
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#define FPGA_MAX_MEM_TRANSFER (1024)
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@ -174,8 +177,6 @@ typedef enum {
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#define DD_HEAD_TRACK_MASK (DD_HEAD_MASK | DD_TRACK_MASK)
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#define DD_HEAD_TRACK_INDEX_LOCK (1 << 13)
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#define SWAP32(x) ((x & 0xFF) << 24 | (x & 0xFF00) << 8 | (x & 0xFF0000) >> 8 | (x & 0xFF000000) >> 24)
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uint8_t fpga_id_get (void);
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uint32_t fpga_reg_get (fpga_reg_t reg);
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@ -1,22 +1,35 @@
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#include <stdbool.h>
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#include <stdint.h>
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#include "sd.h"
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#include "fpga.h"
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#include "debug.h"
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#include "hw.h"
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#include "sd.h"
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#define SD_BUFFER_ADDRESS (0x05000000UL)
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#define CMD6_ARG_CHECK_HS (0x00FFFFF1UL)
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#define CMD6_ARG_SWITCH_HS (0x80FFFFF1UL)
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#define CMD8_ARG_SUPPLY_VOLTAGE_27_36_V (1 << 8)
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#define CMD8_ARG_CHECK_PATTERN (0xAA << 0)
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#define ACMD6_ARG_BUS_WIDTH_4BIT (2 << 0)
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#define ACMD41_ARG_OCR (0xFF8000 << 0)
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#define ACMD41_ARG_HCS (1 << 30)
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#define R3_OCR (0xFF8000 << 0)
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#define R3_CCS (1 << 30)
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#define R3_BUSY (1 << 31)
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#define R6_RCA_MASK (0xFFFF0000UL)
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#define R7_SUPPLY_VOLTAGE_27_36_V (1 << 8)
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#define R7_CHECK_PATTERN (0xAA << 0)
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#define SD_BLOCK_SIZE (512)
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#define DAT_BLOCK_MAX_COUNT (256)
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typedef enum {
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CLOCK_STOP,
|
||||
@ -35,15 +48,39 @@ typedef enum {
|
||||
RSP_R7,
|
||||
} rsp_type_t;
|
||||
|
||||
typedef enum {
|
||||
DAT_READ,
|
||||
DAT_WRITE,
|
||||
} dat_mode_t;
|
||||
|
||||
static bool sd_card_initialized;
|
||||
static bool sd_card_type_block;
|
||||
static uint32_t sd_rca = 0;
|
||||
static volatile bool timeout = false;
|
||||
|
||||
struct process {
|
||||
bool card_initialized;
|
||||
bool card_type_block;
|
||||
uint32_t rca;
|
||||
volatile bool timeout;
|
||||
};
|
||||
|
||||
|
||||
static struct process p;
|
||||
|
||||
|
||||
static void sd_trigger_timeout (void) {
|
||||
timeout = true;
|
||||
p.timeout = true;
|
||||
}
|
||||
|
||||
static void sd_prepare_timeout (uint16_t value) {
|
||||
p.timeout = false;
|
||||
hw_tim_setup(TIM_ID_GVR, value, sd_trigger_timeout);
|
||||
}
|
||||
|
||||
static bool sd_did_timeout (void) {
|
||||
return p.timeout;
|
||||
}
|
||||
|
||||
static void sd_clear_timeout (void) {
|
||||
hw_tim_stop(TIM_ID_GVR);
|
||||
p.timeout = false;
|
||||
}
|
||||
|
||||
static void sd_set_clock (sd_clock_t mode) {
|
||||
@ -91,22 +128,15 @@ static bool sd_cmd (uint8_t cmd, uint32_t arg, rsp_type_t rsp_type, void *rsp) {
|
||||
} while (scr & SD_SCR_CMD_BUSY);
|
||||
|
||||
if (rsp != NULL) {
|
||||
fpga_reg_t rsp_regs[4] = {
|
||||
REG_SD_RSP_3,
|
||||
REG_SD_RSP_2,
|
||||
REG_SD_RSP_1,
|
||||
REG_SD_RSP_0
|
||||
};
|
||||
bool rsp_long = rsp_type & SD_CMD_LONG_RESPONSE;
|
||||
fpga_reg_t rsp_reg = (rsp_long ? 0 : (sizeof(rsp_regs) - 1));
|
||||
bool rsp_long = (cmd_data & SD_CMD_LONG_RESPONSE);
|
||||
uint8_t *rsp_8 = (uint8_t *) (rsp);
|
||||
while (rsp_reg < sizeof(rsp_regs)) {
|
||||
uint32_t rsp_data = fpga_reg_get(rsp_regs[rsp_reg++]);
|
||||
for (int i = 0; i < (rsp_long ? 4 : 1); i++) {
|
||||
uint32_t rsp_data = fpga_reg_get(REG_SD_RSP_0 + i);
|
||||
uint8_t *rsp_data_8 = (uint8_t *) (&rsp_data);
|
||||
for (int i = 0; i < 4; i++) {
|
||||
*rsp_8++ = *rsp_data_8++;
|
||||
}
|
||||
};
|
||||
}
|
||||
}
|
||||
|
||||
if (rsp_type == RSP_R1b) {
|
||||
@ -119,7 +149,7 @@ static bool sd_cmd (uint8_t cmd, uint32_t arg, rsp_type_t rsp_type, void *rsp) {
|
||||
}
|
||||
|
||||
static bool sd_acmd (uint8_t acmd, uint32_t arg, rsp_type_t rsp_type, void *rsp) {
|
||||
if (sd_cmd(55, sd_rca, RSP_R1, NULL)) {
|
||||
if (sd_cmd(55, p.rca, RSP_R1, NULL)) {
|
||||
return true;
|
||||
}
|
||||
if (sd_cmd(acmd, arg, rsp_type, rsp)) {
|
||||
@ -128,158 +158,201 @@ static bool sd_acmd (uint8_t acmd, uint32_t arg, rsp_type_t rsp_type, void *rsp)
|
||||
return false;
|
||||
}
|
||||
|
||||
static void sd_dat_prepare (uint32_t address, uint32_t count, dat_mode_t mode) {
|
||||
uint32_t length = (count * SD_BLOCK_SIZE);
|
||||
uint32_t sd_dat = (((count - 1) << SD_DAT_BLOCKS_BIT) | SD_DAT_FIFO_FLUSH);
|
||||
uint32_t sd_dma_scr = DMA_SCR_START;
|
||||
|
||||
bool sd_read_sectors (uint32_t starting_sector, uint32_t address, uint32_t length) {
|
||||
if (!sd_card_initialized) {
|
||||
return true;
|
||||
if (mode == DAT_READ) {
|
||||
sd_dat |= SD_DAT_START_READ;
|
||||
sd_dma_scr |= DMA_SCR_DIRECTION;
|
||||
} else {
|
||||
sd_dat |= SD_DAT_START_WRITE;
|
||||
}
|
||||
|
||||
if ((length == 0) || (length % 512 != 0) || (length > (256 * 512))) {
|
||||
return true;
|
||||
}
|
||||
|
||||
do {
|
||||
uint32_t blocks = (length / 512);
|
||||
|
||||
timeout = false;
|
||||
hw_tim_setup(TIM_ID_GVR, 5000, sd_trigger_timeout);
|
||||
|
||||
if (!sd_card_type_block) {
|
||||
starting_sector *= 512;
|
||||
}
|
||||
|
||||
// fpga_reg_set(REG_SD_DMA_SCR, DMA_SCR_STOP);
|
||||
// fpga_reg_set(REG_SD_DAT, SD_DAT_STOP | SD_DAT_FIFO_FLUSH);
|
||||
|
||||
fpga_reg_set(REG_SD_DMA_ADDRESS, address);
|
||||
fpga_reg_set(REG_SD_DMA_LENGTH, length);
|
||||
fpga_reg_set(REG_SD_DMA_SCR, DMA_SCR_DIRECTION | DMA_SCR_START);
|
||||
|
||||
fpga_reg_set(REG_SD_DAT, (((blocks - 1) << SD_DAT_BLOCKS_BIT) | SD_DAT_START_READ | SD_DAT_FIFO_FLUSH));
|
||||
|
||||
if (sd_cmd(23, blocks, RSP_R1, NULL)) {
|
||||
break;
|
||||
}
|
||||
|
||||
if (sd_cmd(18, starting_sector, RSP_R1, NULL)) {
|
||||
break;
|
||||
}
|
||||
|
||||
bool error = false;
|
||||
|
||||
while (!timeout) {
|
||||
uint32_t sd_scr = fpga_reg_get(REG_SD_SCR);
|
||||
if (!(sd_scr & SD_SCR_CARD_INSERTED)) {
|
||||
error = true;
|
||||
break;
|
||||
}
|
||||
uint32_t sd_dat = fpga_reg_get(REG_SD_DAT);
|
||||
uint32_t sd_dma_scr = fpga_reg_get(REG_SD_DMA_SCR);
|
||||
if (sd_dat & SD_DAT_ERROR) {
|
||||
error = true;
|
||||
break;
|
||||
}
|
||||
if ((!(sd_dma_scr & DMA_SCR_BUSY)) && (!(sd_dat & SD_DAT_BUSY))) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (timeout) {
|
||||
break;
|
||||
}
|
||||
|
||||
hw_tim_stop(TIM_ID_GVR);
|
||||
|
||||
if (error) {
|
||||
break;
|
||||
}
|
||||
|
||||
return false;
|
||||
} while (0);
|
||||
fpga_reg_set(REG_SD_DAT, sd_dat);
|
||||
fpga_reg_set(REG_SD_DMA_ADDRESS, address);
|
||||
fpga_reg_set(REG_SD_DMA_LENGTH, length);
|
||||
fpga_reg_set(REG_SD_DMA_SCR, sd_dma_scr);
|
||||
}
|
||||
|
||||
static void sd_dat_abort (void) {
|
||||
fpga_reg_set(REG_SD_DMA_SCR, DMA_SCR_STOP);
|
||||
fpga_reg_set(REG_SD_DAT, SD_DAT_STOP | SD_DAT_FIFO_FLUSH);
|
||||
}
|
||||
|
||||
static bool sd_dat_wait (uint16_t timeout) {
|
||||
sd_prepare_timeout(timeout);
|
||||
|
||||
do {
|
||||
uint32_t sd_dat = fpga_reg_get(REG_SD_DAT);
|
||||
uint32_t sd_dma_scr = fpga_reg_get(REG_SD_DMA_SCR);
|
||||
if ((!(sd_dat & SD_DAT_BUSY)) && (!(sd_dma_scr & DMA_SCR_BUSY))) {
|
||||
sd_clear_timeout();
|
||||
return (sd_dat & SD_DAT_ERROR);
|
||||
}
|
||||
} while (!sd_did_timeout());
|
||||
|
||||
sd_dat_abort();
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
bool sd_card_initialize (void) {
|
||||
bool error;
|
||||
|
||||
bool sd_read_sectors (uint32_t address, uint32_t sector, uint32_t count) {
|
||||
if (!p.card_initialized || (count == 0)) {
|
||||
return true;
|
||||
}
|
||||
|
||||
if (!p.card_type_block) {
|
||||
sector *= SD_BLOCK_SIZE;
|
||||
}
|
||||
|
||||
while (count > 0) {
|
||||
uint32_t blocks = ((count > DAT_BLOCK_MAX_COUNT) ? DAT_BLOCK_MAX_COUNT : count);
|
||||
sd_dat_prepare(address, blocks, DAT_READ);
|
||||
if (sd_cmd(23, blocks, RSP_R1, NULL)) {
|
||||
sd_dat_abort();
|
||||
return true;
|
||||
}
|
||||
if (sd_cmd(18, sector, RSP_R1, NULL)) {
|
||||
sd_dat_abort();
|
||||
return true;
|
||||
}
|
||||
if (sd_dat_wait(1000)) {
|
||||
if (sd_did_timeout()) {
|
||||
sd_cmd(12, 0, RSP_R1b, NULL);
|
||||
}
|
||||
return true;
|
||||
}
|
||||
address += (blocks * SD_BLOCK_SIZE);
|
||||
sector += (blocks * (p.card_type_block ? 1 : SD_BLOCK_SIZE));
|
||||
count -= blocks;
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
bool sd_card_init (void) {
|
||||
uint32_t arg;
|
||||
uint32_t rsp;
|
||||
bool version_2_or_later = false;
|
||||
uint16_t sd_function;
|
||||
|
||||
if (sd_card_initialized) {
|
||||
if (p.card_initialized) {
|
||||
return false;
|
||||
}
|
||||
|
||||
p.card_initialized = true;
|
||||
p.rca = 0;
|
||||
|
||||
sd_set_clock(CLOCK_400KHZ);
|
||||
|
||||
do {
|
||||
sd_cmd(0, 0, RSP_NONE, NULL);
|
||||
|
||||
arg = (CMD8_ARG_SUPPLY_VOLTAGE_27_36_V | CMD8_ARG_CHECK_PATTERN);
|
||||
if (!sd_cmd(8, arg, RSP_R7, &rsp)) {
|
||||
version_2_or_later = true;
|
||||
if (rsp != (R7_SUPPLY_VOLTAGE_27_36_V | R7_CHECK_PATTERN)) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
arg = ((version_2_or_later ? ACMD41_ARG_HCS : 0) | 0x00FF8000);
|
||||
for (int i = 0; i < 4000; i++) {
|
||||
error = sd_acmd(41, arg, RSP_R3, &rsp);
|
||||
if (error || (rsp & R3_BUSY)) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (error || ((rsp & 0x00FF8000) == 0)) {
|
||||
break;
|
||||
}
|
||||
sd_card_type_block = (rsp & R3_CCS);
|
||||
|
||||
if (sd_cmd(2, 0, RSP_R2, NULL)) {
|
||||
break;
|
||||
}
|
||||
|
||||
if (sd_cmd(3, 0, RSP_R6, &rsp)) {
|
||||
break;
|
||||
}
|
||||
sd_rca = rsp & 0xFFFF0000;
|
||||
|
||||
if (sd_cmd(7, sd_rca, RSP_R1b, NULL)) {
|
||||
break;
|
||||
}
|
||||
|
||||
if (sd_acmd(6, 2, RSP_R1, NULL)) {
|
||||
break;
|
||||
}
|
||||
|
||||
sd_set_clock(CLOCK_50MHZ);
|
||||
|
||||
sd_card_initialized = true;
|
||||
|
||||
return false;
|
||||
} while (0);
|
||||
|
||||
sd_rca = 0;
|
||||
sd_cmd(0, 0, RSP_NONE, NULL);
|
||||
sd_set_clock(CLOCK_STOP);
|
||||
|
||||
return true;
|
||||
arg = (CMD8_ARG_SUPPLY_VOLTAGE_27_36_V | CMD8_ARG_CHECK_PATTERN);
|
||||
if (sd_cmd(8, arg, RSP_R7, &rsp)) {
|
||||
arg = ACMD41_ARG_OCR;
|
||||
} else {
|
||||
if (rsp != (R7_SUPPLY_VOLTAGE_27_36_V | R7_CHECK_PATTERN)) {
|
||||
sd_card_deinit();
|
||||
return true;
|
||||
}
|
||||
arg = (ACMD41_ARG_HCS | ACMD41_ARG_OCR);
|
||||
}
|
||||
|
||||
sd_prepare_timeout(1000);
|
||||
do {
|
||||
if (sd_did_timeout()) {
|
||||
sd_card_deinit();
|
||||
return true;
|
||||
}
|
||||
if (sd_acmd(41, arg, RSP_R3, &rsp)) {
|
||||
sd_card_deinit();
|
||||
return true;
|
||||
}
|
||||
if (rsp & R3_BUSY) {
|
||||
if ((rsp & R3_OCR) == 0) {
|
||||
sd_card_deinit();
|
||||
return true;
|
||||
}
|
||||
p.card_type_block = (rsp & R3_CCS);
|
||||
break;
|
||||
}
|
||||
} while (1);
|
||||
sd_clear_timeout();
|
||||
|
||||
if (sd_cmd(2, 0, RSP_R2, NULL)) {
|
||||
sd_card_deinit();
|
||||
return true;
|
||||
}
|
||||
|
||||
if (sd_cmd(3, 0, RSP_R6, &rsp)) {
|
||||
sd_card_deinit();
|
||||
return true;
|
||||
}
|
||||
p.rca = (rsp & R6_RCA_MASK);
|
||||
|
||||
if (sd_cmd(7, p.rca, RSP_R1b, NULL)) {
|
||||
sd_card_deinit();
|
||||
return true;
|
||||
}
|
||||
|
||||
sd_set_clock(CLOCK_25MHZ);
|
||||
|
||||
if (sd_acmd(6, ACMD6_ARG_BUS_WIDTH_4BIT, RSP_R1, NULL)) {
|
||||
sd_card_deinit();
|
||||
return true;
|
||||
}
|
||||
|
||||
sd_dat_prepare(SD_BUFFER_ADDRESS, 1, DAT_READ);
|
||||
if (sd_cmd(6, CMD6_ARG_CHECK_HS, RSP_R1, NULL)) {
|
||||
sd_dat_abort();
|
||||
sd_card_deinit();
|
||||
return true;
|
||||
}
|
||||
sd_dat_wait(1000);
|
||||
if (sd_did_timeout()) {
|
||||
sd_card_deinit();
|
||||
return true;
|
||||
}
|
||||
fpga_mem_read(SD_BUFFER_ADDRESS + 12, 2, (uint8_t *) (&sd_function));
|
||||
if (SWAP16(sd_function) & (1 << 1)) {
|
||||
sd_dat_prepare(SD_BUFFER_ADDRESS, 1, DAT_READ);
|
||||
if (sd_cmd(6, CMD6_ARG_SWITCH_HS, RSP_R1, NULL)) {
|
||||
sd_dat_abort();
|
||||
sd_card_deinit();
|
||||
return true;
|
||||
}
|
||||
sd_dat_wait(1000);
|
||||
if (sd_did_timeout()) {
|
||||
sd_card_deinit();
|
||||
return true;
|
||||
}
|
||||
fpga_mem_read(SD_BUFFER_ADDRESS + 12, 2, (uint8_t *) (&sd_function));
|
||||
if (SWAP16(sd_function) & (1 << 1)) {
|
||||
sd_set_clock(CLOCK_50MHZ);
|
||||
}
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
void sd_card_deinit (void) {
|
||||
if (p.card_initialized) {
|
||||
p.card_initialized = false;
|
||||
sd_set_clock(CLOCK_400KHZ);
|
||||
sd_cmd(0, 0, RSP_NONE, NULL);
|
||||
sd_set_clock(CLOCK_STOP);
|
||||
}
|
||||
}
|
||||
|
||||
void sd_init (void) {
|
||||
sd_card_initialized = false;
|
||||
p.card_initialized = false;
|
||||
sd_set_clock(CLOCK_STOP);
|
||||
}
|
||||
|
||||
void sd_process (void) {
|
||||
if (!(fpga_reg_get(REG_SD_SCR) & SD_SCR_CARD_INSERTED)) {
|
||||
if (sd_card_initialized) {
|
||||
sd_card_initialized = false;
|
||||
sd_rca = 0;
|
||||
sd_set_clock(CLOCK_STOP);
|
||||
}
|
||||
sd_card_deinit();
|
||||
}
|
||||
}
|
||||
|
||||
@ -5,8 +5,9 @@
|
||||
#include <stdbool.h>
|
||||
|
||||
|
||||
bool sd_read_sectors (uint32_t starting_sector, uint32_t address, uint32_t length);
|
||||
bool sd_card_initialize (void);
|
||||
bool sd_read_sectors (uint32_t address, uint32_t sector, uint32_t count);
|
||||
bool sd_card_init (void);
|
||||
void sd_card_deinit (void);
|
||||
void sd_init (void);
|
||||
void sd_process (void);
|
||||
|
||||
|
||||
@ -276,11 +276,10 @@ class SC64:
|
||||
DD_DISK_SWAP = 3
|
||||
|
||||
class BootMode(IntEnum):
|
||||
SD = 0
|
||||
USB = 1
|
||||
ROM = 2
|
||||
DDIPL = 3
|
||||
DIRECT = 4
|
||||
MENU = 0
|
||||
ROM = 1
|
||||
DDIPL = 2
|
||||
DIRECT = 3
|
||||
|
||||
class SaveType(IntEnum):
|
||||
NONE = 0
|
||||
@ -357,7 +356,7 @@ class SC64:
|
||||
self.__set_config(self.__CfgId.ROM_SHADOW_ENABLE, False)
|
||||
self.__set_config(self.__CfgId.DD_MODE, self.__DDMode.NONE)
|
||||
self.__set_config(self.__CfgId.ISV_ENABLE, False)
|
||||
self.__set_config(self.__CfgId.BOOT_MODE, self.BootMode.USB)
|
||||
self.__set_config(self.__CfgId.BOOT_MODE, self.BootMode.MENU)
|
||||
self.__set_config(self.__CfgId.SAVE_TYPE, self.SaveType.NONE)
|
||||
self.__set_config(self.__CfgId.CIC_SEED, self.CICSeed.AUTO)
|
||||
self.__set_config(self.__CfgId.TV_TYPE, self.TVType.AUTO)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user