mirror of
https://github.com/Polprzewodnikowy/SummerCart64.git
synced 2024-11-28 00:14:14 +01:00
changed CIC initialization to be non blocking regardless of RTC init status
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e1d9a8def3
commit
fd8395fcc0
@ -26,7 +26,7 @@ void init (init_tv_type_t tv_type, init_reset_type_t reset_type) {
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exception_enable_interrupts();
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exception_enable_interrupts();
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if ((error = sc64_set_config(CFG_ID_BOOTLOADER_SWITCH, false)) != SC64_OK) {
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if ((error = sc64_set_config(CFG_ID_BOOTLOADER_SWITCH, false)) != SC64_OK) {
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error_display("Command SET_CONFIG [BOOTLOADER_SWITCH] failed: %d", error);
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error_display("Command CONFIG_SET [BOOTLOADER_SWITCH] failed: %d", error);
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}
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}
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if (test_check()) {
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if (test_check()) {
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@ -36,7 +36,8 @@ void init (init_tv_type_t tv_type, init_reset_type_t reset_type) {
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}
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}
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void deinit (void) {
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void deinit (void) {
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sc64_lock();
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exception_disable_interrupts();
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exception_disable_interrupts();
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exception_disable_watchdog();
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exception_disable_watchdog();
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sc64_lock();
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}
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}
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@ -12,6 +12,9 @@ typedef enum {
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} cic_region_t;
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} cic_region_t;
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static bool cic_initialized = false;
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static void cic_irq_reset_falling (void) {
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static void cic_irq_reset_falling (void) {
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led_clear_error(LED_ERROR_CIC);
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led_clear_error(LED_ERROR_CIC);
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}
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}
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@ -65,18 +68,26 @@ void cic_set_dd_mode (bool enabled) {
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void cic_init (void) {
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void cic_init (void) {
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while (!rtc_is_initialized());
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cic_reset_parameters();
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hw_gpio_irq_setup(GPIO_ID_N64_RESET, GPIO_IRQ_FALLING, cic_irq_reset_falling);
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hw_gpio_irq_setup(GPIO_ID_N64_RESET, GPIO_IRQ_FALLING, cic_irq_reset_falling);
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}
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}
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void cic_process (void) {
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void cic_process (void) {
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if (!cic_initialized) {
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if (rtc_is_initialized()) {
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cic_reset_parameters();
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cic_initialized = true;
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} else {
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return;
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}
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}
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uint32_t cic_config_0 = fpga_reg_get(REG_CIC_0);
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uint32_t cic_config_0 = fpga_reg_get(REG_CIC_0);
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if (cic_config_0 & CIC_INVALID_REGION_DETECTED) {
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if (cic_config_0 & CIC_INVALID_REGION_DETECTED) {
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cic_config_0 ^= CIC_REGION;
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cic_config_0 ^= CIC_REGION;
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fpga_reg_set(REG_CIC_0, (cic_config_0 | CIC_INVALID_REGION_RESET));
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cic_config_0 |= CIC_INVALID_REGION_RESET;
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fpga_reg_set(REG_CIC_0, cic_config_0);
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if (cic_config_0 & CIC_REGION) {
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if (cic_config_0 & CIC_REGION) {
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rtc_set_region(REGION_PAL);
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rtc_set_region(REGION_PAL);
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@ -200,8 +200,6 @@ static void rtc_init (void) {
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rtc_write(RTC_ADDRESS_SRAM_VERSION, (uint8_t *) (&settings_version), 4);
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rtc_write(RTC_ADDRESS_SRAM_VERSION, (uint8_t *) (&settings_version), 4);
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rtc_write_settings();
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rtc_write_settings();
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}
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}
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rtc_initialized = true;
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}
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}
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@ -275,6 +273,8 @@ void rtc_task (void) {
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rtc_read_region();
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rtc_read_region();
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rtc_read_settings();
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rtc_read_settings();
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rtc_initialized = true;
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while (1) {
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while (1) {
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if (rtc_time_pending) {
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if (rtc_time_pending) {
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rtc_time_pending = false;
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rtc_time_pending = false;
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