13 Commits

Author	SHA1	Message	Date
Polprzewodnikowy	a22f2efa87	ISV in hardware finally	2022-01-22 23:19:07 +01:00
Polprzewodnikowy	d1823be902	double buffered reads	2022-01-22 13:03:05 +01:00
Polprzewodnikowy	39c2edbb9a	usb gets fast	2022-01-22 00:10:47 +01:00
Polprzewodnikowy	1c8e7a4765	reduced buffer size	2022-01-21 21:42:17 +01:00
Polprzewodnikowy	8410cbe191	super slow usb storage reading implemented	2022-01-21 21:29:41 +01:00
Polprzewodnikowy	4b888d0f71	isv support + usb/dd improvements	2021-12-27 00:01:07 +01:00
Mateusz Faderewski	92e5c5747b	[SC64][FW][SW] Added 64DD implementation with USB streaming (#14)	2021-12-24 23:51:30 +01:00
Mateusz Faderewski	71f134178a	[SC64][FW][SW] Added escape mechanism in USB, changed N64 boot procedure, added "fake SD card through USB" feature, rewritten PC communication software (#13)	2021-12-10 17:36:30 +01:00
Mateusz Faderewski	29aca8aea6	[SC64][FW][SW] Made CPU boot process simpler, UART is now an optional module (#12)	2021-11-16 22:37:48 +01:00
Mateusz Faderewski	8485face13	[SC64][FW][SW] Updated project for Quartus Lite 21.1, reworked build script, minor fixes in USB and CFG modules (#11)	2021-11-10 02:05:51 +01:00
Mateusz Faderewski	d1bf99fdf4	[SC64][FW][SW] Added command to reconfigure FPGA from software (#10)	2021-10-29 00:19:17 +02:00
Mateusz Faderewski	adff845460	[SC64][FW][SW] Load CPU software directly from embedded flash in FPGA (#9)	2021-10-26 23:44:09 +02:00
Mateusz Faderewski	45fbd53001	[SC64][FW][SW] Complete fw/sw rewrite with RISC-V softcore CPU as flashcart controller (#5)	2021-09-25 20:00:36 +02:00