Commit Graph

16 Commits

Author SHA1 Message Date
Mateusz Faderewski
dea9441784 Merge branch 'main' into new-irq 2024-04-11 02:35:24 +02:00
Mateusz Faderewski
e93cecfae3 [SC64][FW][SW] Fixed unreliable CIC boot 2024-04-11 01:34:36 +02:00
Mateusz Faderewski
feb3adeb50 initial irq overhaul 2024-04-10 22:01:38 +02:00
Mateusz Faderewski
f6b94aec97 [SC64][FW][SW] Added CIC diagnostic, changed software timeout timer to hardware (derived from PIF clock) 2024-04-10 12:56:05 +02:00
Mateusz Faderewski
421d0438f3
[SC64][FW][SW] Controller rewrite to remove task subsystem + minor bug fixes (#64)
This PR completely removes `task.c / task.h` from `sw/controller` STM32
code.
Additionally, these changes were implemented:
- Updated IPL3
- Added new diagnostic data (voltage and temperature) readout commands
for USB and N64
- Fixed some issues with FlashRAM save type
- Joybus timings were relaxed to accommodate communication with
unsynchronized master controller (like _Datel Game Killer_, thanks
@RWeick)
- N64 embedded test program now waits for release of button press to
proceed
- Fixed issue where, in rare circumstances, I2C peripheral in STM32
would get locked-up on power-up
- LED blinking behavior on SD card access was changed
- LED blink duration on save writeback has been extended
- Minor fixes through the entire of hardware abstraction layer for STM32
code
- Primer now correctly detects issues with I2C bus during first time
programming
- `primer.py` script gives more meaningful error messages
- Fixed bug where RTC time was always written on N64FlashcartMenu boot
- sc64deployer now displays "Diagnostic data" instead of "MCU stack
usage"
2024-01-29 14:23:18 +01:00
Mateusz Faderewski
ff27e35ae8
[SC64][FW][SW] Moved CIC emulation from MCU to FPGA (#56) 2023-12-14 19:26:54 +01:00
Mateusz Faderewski
409ba28359 [SC64][SW] Changed firmware version reporting 2023-02-20 18:17:09 +01:00
Mateusz Faderewski
49105a6105 [SC64][DOCS] Added memory map documentation 2022-12-28 12:49:15 +01:00
Mateusz Faderewski
76ad09cf4a [SC64][FW] Added save write count register for SD save writeback 2022-11-24 22:55:05 +01:00
Mateusz Faderewski
ff69030643
[SC64][FW][HW][SW] New version based on LCMXO2 FPGA (#19)
* isv support + usb/dd improvements

* make room for saves

* update offset

* fixed debug address

* idk

* exception

* ironed out all broken stuff

* cleanup

* return epc fix

* better

* more cleanup

* even more cleanup

* mooore cleanup

* fixed printf

* no assert

* improved docker build, pyft232 instead of pyserial

* fixed displaying long message strings

description test

* just straight cleanup

* smallest cleanup

* PAL

* cpu buffer

* n64 bootloader done

* super slow usb storage reading implemented

* reduced buffer size

* usb gets fast

* little cleanup

* double buffered reads

* removed separate event id

* ISV in hardware finally

* small exception changes

* mac testing

* py spacing

* fsd write, rtc, isv and reset fixes

* fixxx

* good stopping point

* usb fixed?

* pretend we have 128 MB sdram

* backup

* chmod

* test

* test done

* more tests

* user rm

* help

* final fix

* updated component values

* nice asset names

* cic 64dd support

* ddipl enable separation

* pre DMA rewrite, created dedicated buffer memory space, simplified code

* dma rewrite, needs testing

* moved xml

* dd basics

* timing

* 64dd working yet again, isv brought back, dma fixes, usb path rewrite, pc code rewrite

* added usb read functionality, general cleanup

* changed mem addressing

* added fpga flash update access

* added mcu update

* chmod

* little cleanup

* update format and stuff

* fixes

* uninitialized fix

* small fixes

* update fixes

* update stuff done

* fpga update tested

* build time fix

* boot fix

* test timing

* readme test

* test 2

* reports

* testseet

* final

* build test

* forgot

* button and naming

* General cleanup

And multiline commit message test

* Exception screen UI touch ups

* display separation and tests beginning

* pc software update

* pc software done

* timing test

* delete launch.json

* sw fixes

* fixed button hole diameter in shell

* small cleanup, rpi testing

* shell fillet fix, pc rtc printing

* added cfg lock mechanism

* moved lock to cfg address space

* extended ROM and ISV fixes

* preliminary sd card support

* little sd card cleanup

* sd menu fixes

* 5 second limit

* reduced shell thickness

* basic led act blinking

* faster sd menu loading

* inst cache invalidate

* sd card writing is working

* SD card CSD and CID registers

* wait for previous command

* led error codes

* fixed cfg_translate_address use

* 64dd from sd card working

* 64dd speedup and button handling

* delayed address latching cycle - might break other builds, needs testing

* bootloader improvements

* small fixes

* return previous cfg when setting new

* cache stuff

* unfloader debug protocol support

* UNFLoader style debug command line support

* requirements.txt

* shell groove fillet

* reset state inside controller

* fixed fast PI read, added PI R/W fifo debug info

* PI access prioritize

* SD clock stop when RX FIFO is more than half full

* flash erase method change

* CFG error handling, TLOZ MM debug ISV support

* CIC5167 support

* general fixes

* USB unplugged cable handling

* turn off led when changing between error/act modes

* rtc 2 bit clock stop support

* line endings

* Revert "line endings"

This reverts commit d0ddfe5ec7.

* PI address debug

* readme test

* diagram update

* diagram background

* diagram background

* diagram background

* updated readme
2022-11-10 11:46:54 +01:00
Mateusz Faderewski
92e5c5747b
[SC64][FW][SW] Added 64DD implementation with USB streaming (#14) 2021-12-24 23:51:30 +01:00
Mateusz Faderewski
71f134178a
[SC64][FW][SW] Added escape mechanism in USB, changed N64 boot procedure, added "fake SD card through USB" feature, rewritten PC communication software (#13) 2021-12-10 17:36:30 +01:00
Mateusz Faderewski
adff845460
[SC64][FW][SW] Load CPU software directly from embedded flash in FPGA (#9) 2021-10-26 23:44:09 +02:00
Mateusz Faderewski
45fbd53001
[SC64][FW][SW] Complete fw/sw rewrite with RISC-V softcore CPU as flashcart controller (#5) 2021-09-25 20:00:36 +02:00
Mateusz Faderewski
b2395a4726
[SC64][FW][SW] USB debug interface, SD Card interface and bootloader, SRAM save emulation, SDRAM constraints, general improvements (#3) 2021-02-01 00:40:56 +01:00
Polprzewodnikowy
5c4a886bcc [SC64][FW][HW][SW] Completely new concept for firmware, abandoned SummerBanger64 for N64-UNFLoader, added UltraCIC-III as submodule, CI configuration 2020-11-06 00:17:08 +01:00