Commit Graph

15 Commits

Author SHA1 Message Date
Mateusz Faderewski
eb7197a847 changed artifact names 2023-02-18 18:55:54 +01:00
Mateusz Faderewski
ed6d01a066 [SC64][SW] Changed update file name / improved manufacturing guidelines 2023-02-17 11:26:50 +01:00
Mateusz Faderewski
855ef3248a [SC64][HW] Added PCB BOM 2023-02-16 18:12:15 +01:00
Mateusz Faderewski
a8a3e7d57c [SC64] Added assets to release package 2023-02-10 18:05:41 +01:00
Mateusz Faderewski
4795e23890 [SC64] Added docs and hw files to release package 2023-02-09 23:31:14 +01:00
Mateusz Faderewski
65baa521b4 [SC64][SW] Bootloader fixes 2023-01-30 05:55:15 +01:00
Mateusz Faderewski
5b85b0f661
[SC64][SW] Added board bring-up via UART header (#20)
* [SC64][SW] Added board bring-up via UART header

* [SC64][SW] Made I2C in primer stable

* [SC64][SW] LCMXO2 primer fixes

* [SC64][SW] SC64 primer PC software

* [SC64][SW] Added primer.py to release package

* [SC64][SW] Fixed FPGA refresh

* [SC64][SW] Changed release package contents
2023-01-21 04:08:15 +01:00
Mateusz Faderewski
ff69030643
[SC64][FW][HW][SW] New version based on LCMXO2 FPGA (#19)
* isv support + usb/dd improvements

* make room for saves

* update offset

* fixed debug address

* idk

* exception

* ironed out all broken stuff

* cleanup

* return epc fix

* better

* more cleanup

* even more cleanup

* mooore cleanup

* fixed printf

* no assert

* improved docker build, pyft232 instead of pyserial

* fixed displaying long message strings

description test

* just straight cleanup

* smallest cleanup

* PAL

* cpu buffer

* n64 bootloader done

* super slow usb storage reading implemented

* reduced buffer size

* usb gets fast

* little cleanup

* double buffered reads

* removed separate event id

* ISV in hardware finally

* small exception changes

* mac testing

* py spacing

* fsd write, rtc, isv and reset fixes

* fixxx

* good stopping point

* usb fixed?

* pretend we have 128 MB sdram

* backup

* chmod

* test

* test done

* more tests

* user rm

* help

* final fix

* updated component values

* nice asset names

* cic 64dd support

* ddipl enable separation

* pre DMA rewrite, created dedicated buffer memory space, simplified code

* dma rewrite, needs testing

* moved xml

* dd basics

* timing

* 64dd working yet again, isv brought back, dma fixes, usb path rewrite, pc code rewrite

* added usb read functionality, general cleanup

* changed mem addressing

* added fpga flash update access

* added mcu update

* chmod

* little cleanup

* update format and stuff

* fixes

* uninitialized fix

* small fixes

* update fixes

* update stuff done

* fpga update tested

* build time fix

* boot fix

* test timing

* readme test

* test 2

* reports

* testseet

* final

* build test

* forgot

* button and naming

* General cleanup

And multiline commit message test

* Exception screen UI touch ups

* display separation and tests beginning

* pc software update

* pc software done

* timing test

* delete launch.json

* sw fixes

* fixed button hole diameter in shell

* small cleanup, rpi testing

* shell fillet fix, pc rtc printing

* added cfg lock mechanism

* moved lock to cfg address space

* extended ROM and ISV fixes

* preliminary sd card support

* little sd card cleanup

* sd menu fixes

* 5 second limit

* reduced shell thickness

* basic led act blinking

* faster sd menu loading

* inst cache invalidate

* sd card writing is working

* SD card CSD and CID registers

* wait for previous command

* led error codes

* fixed cfg_translate_address use

* 64dd from sd card working

* 64dd speedup and button handling

* delayed address latching cycle - might break other builds, needs testing

* bootloader improvements

* small fixes

* return previous cfg when setting new

* cache stuff

* unfloader debug protocol support

* UNFLoader style debug command line support

* requirements.txt

* shell groove fillet

* reset state inside controller

* fixed fast PI read, added PI R/W fifo debug info

* PI access prioritize

* SD clock stop when RX FIFO is more than half full

* flash erase method change

* CFG error handling, TLOZ MM debug ISV support

* CIC5167 support

* general fixes

* USB unplugged cable handling

* turn off led when changing between error/act modes

* rtc 2 bit clock stop support

* line endings

* Revert "line endings"

This reverts commit d0ddfe5ec7.

* PI address debug

* readme test

* diagram update

* diagram background

* diagram background

* diagram background

* updated readme
2022-11-10 11:46:54 +01:00
Mateusz Faderewski
71f134178a
[SC64][FW][SW] Added escape mechanism in USB, changed N64 boot procedure, added "fake SD card through USB" feature, rewritten PC communication software (#13) 2021-12-10 17:36:30 +01:00
Mateusz Faderewski
29aca8aea6
[SC64][FW][SW] Made CPU boot process simpler, UART is now an optional module (#12) 2021-11-16 22:37:48 +01:00
Mateusz Faderewski
8485face13
[SC64][FW][SW] Updated project for Quartus Lite 21.1, reworked build script, minor fixes in USB and CFG modules (#11) 2021-11-10 02:05:51 +01:00
Mateusz Faderewski
adff845460
[SC64][FW][SW] Load CPU software directly from embedded flash in FPGA (#9) 2021-10-26 23:44:09 +02:00
Mateusz Faderewski
ec1fbf3ec1
[SC64][CI/CD] Moved docker build environment to another repository (#7) 2021-09-26 14:42:50 +02:00
Mateusz Faderewski
7207d1a528
[SC64][CI/CD] Update build action/scripts (#6) 2021-09-25 23:46:53 +02:00
Mateusz Faderewski
45fbd53001
[SC64][FW][SW] Complete fw/sw rewrite with RISC-V softcore CPU as flashcart controller (#5) 2021-09-25 20:00:36 +02:00