mirror of
https://github.com/Polprzewodnikowy/SummerCart64.git
synced 2024-11-28 16:34:14 +01:00
68 lines
2.6 KiB
XML
68 lines
2.6 KiB
XML
<?xml version="1.0" encoding="UTF-8"?>
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<system name="$${FILENAME}">
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<component
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name="$${FILENAME}"
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displayName="$${FILENAME}"
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version="1.0"
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description=""
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tags="INTERNAL_COMPONENT=true"
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categories="System" />
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<parameter name="bonusData"><![CDATA[bonusData
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{
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element dual_boot_0
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{
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datum _sortIndex
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{
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value = "0";
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type = "int";
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}
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}
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}
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]]></parameter>
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<parameter name="clockCrossingAdapter" value="HANDSHAKE" />
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<parameter name="device" value="10M08SCE144C8G" />
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<parameter name="deviceFamily" value="MAX 10" />
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<parameter name="deviceSpeedGrade" value="8" />
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<parameter name="fabricMode" value="QSYS" />
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<parameter name="generateLegacySim" value="false" />
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<parameter name="generationId" value="0" />
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<parameter name="globalResetBus" value="false" />
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<parameter name="hdlLanguage" value="VERILOG" />
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<parameter name="hideFromIPCatalog" value="true" />
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<parameter name="lockedInterfaceDefinition" value="" />
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<parameter name="maxAdditionalLatency" value="1" />
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<parameter name="projectName" value="" />
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<parameter name="sopcBorderPoints" value="false" />
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<parameter name="systemHash" value="0" />
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<parameter name="testBenchDutName" value="" />
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<parameter name="timeStamp" value="0" />
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<parameter name="useTestBenchNamingPattern" value="false" />
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<instanceScript></instanceScript>
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<interface name="avalon" internal="dual_boot_0.avalon" type="avalon" dir="end">
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<port name="avmm_rcv_address" internal="avmm_rcv_address" />
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<port name="avmm_rcv_read" internal="avmm_rcv_read" />
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<port name="avmm_rcv_writedata" internal="avmm_rcv_writedata" />
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<port name="avmm_rcv_write" internal="avmm_rcv_write" />
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<port name="avmm_rcv_readdata" internal="avmm_rcv_readdata" />
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</interface>
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<interface name="clk" internal="dual_boot_0.clk" type="clock" dir="end">
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<port name="clk" internal="clk" />
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</interface>
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<interface name="nreset" internal="dual_boot_0.nreset" type="reset" dir="end">
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<port name="nreset" internal="nreset" />
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</interface>
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<module
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name="dual_boot_0"
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kind="altera_dual_boot"
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version="20.1"
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enabled="1"
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autoexport="1">
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<parameter name="CLOCK_FREQUENCY" value="50.0" />
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<parameter name="INTENDED_DEVICE_FAMILY" value="MAX 10" />
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</module>
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<interconnectRequirement for="$system" name="qsys_mm.clockCrossingAdapter" value="HANDSHAKE" />
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<interconnectRequirement for="$system" name="qsys_mm.enableEccProtection" value="FALSE" />
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<interconnectRequirement for="$system" name="qsys_mm.insertDefaultSlave" value="FALSE" />
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<interconnectRequirement for="$system" name="qsys_mm.maxAdditionalLatency" value="1" />
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</system>
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