Mateusz Faderewski 64f78e040a even more fixes and tests

2024-07-08 17:00:49 +02:00

..

generated

[SC64][FW] Set timing constraints for SDRAM pins

2024-05-05 07:08:44 +02:00

fifo_8kb.sv

even more fixes and tests

2024-07-08 17:00:49 +02:00

pll.sv

[SC64][FW] Set timing constraints for SDRAM pins

2024-05-05 07:08:44 +02:00

vendor.sv

[SC64][FW][HW][SW] New version based on LCMXO2 FPGA (#19)

2022-11-10 11:46:54 +01:00