mirror of
https://github.com/Polprzewodnikowy/SummerCart64.git
synced 2024-11-22 14:09:16 +01:00
394 lines
12 KiB
Python
394 lines
12 KiB
Python
#!/usr/bin/env python3
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import argparse
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import progressbar
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import struct
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import sys
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import time
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from pyftdi.spi import SpiController
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class SummerBanger64:
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# Command ids
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__CMD_STATUS = 0x00
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__CMD_CONFIG = 0x10
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__CMD_ADDR = 0x20
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__CMD_READ_LENGTH = 0x30
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__CMD_WRITE = 0x40
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__CMD_READ = 0x50
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__CMD_CART_RESET = 0xFC
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__CMD_FLUSH_WRITE = 0xFD
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__CMD_FLUSH_READ = 0xFE
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__CMD_SPI_RESET = 0xFF
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# Size declarations
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__FIFO_SIZE = 1024
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__FIFO_SIZE_BYTES = __FIFO_SIZE * 4
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__FLASH_PAGE_SIZE = 256
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# Cart addresses
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__SDRAM_ADDRESS = 0x10000000
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__FLASH_ADDRESS = 0x18000000
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__FLASH_CFG_ADDRESS = 0x1C000000
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__CART_CONFIG_ADDRESS = 0x1E000000
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__CIC_TYPE_ADDRESS = 0x1E000004
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# Cart config register bits
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__FLASH_ENABLE = (1 << 0)
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__SDRAM_ENABLE = (1 << 1)
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def __init__(self, config = {}):
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self.__spi_controller = SpiController(cs_count=1)
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self.__spi_controller.configure('ftdi://ftdi:2232h/1')
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self.__spi = self.__spi_controller.get_port(0, float(config['spi_speed']))
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self.__update_progress = config['update_progress']
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if (not config['no_init']):
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self.__reset()
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self.__set_config(n64_disable=True, address_increment=True)
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self.__write_word(self.__CART_CONFIG_ADDRESS, (self.__SDRAM_ENABLE | self.__FLASH_ENABLE))
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self.__config = config
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def __del__(self):
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if (not self.__config['no_init']):
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self.__reset()
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self.__spi_controller.terminate()
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def __get_status(self, field=None):
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status_word = struct.unpack('>I', self.__spi.exchange([self.__CMD_STATUS], 4))[0]
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status = {
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'status': hex(status_word),
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'control_byte': (status_word & (0xFF << 24)) >> 24,
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'address_increment': (status_word & (0x1 << 23)) >> 23,
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'n64_disabled': (status_word & (0x1 << 22)) >> 22,
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'write_used': (status_word & (0x7FF << 11)) >> 11,
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'read_used': (status_word & (0x7FF << 0)) >> 0,
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}
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return status.get(field) if field else status
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def __set_config(self, n64_disable=False, address_increment=True):
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config = (
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((1 if address_increment else 0) << 1) |
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((1 if n64_disable else 0) << 0)
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)
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self.__spi.write(bytearray([self.__CMD_CONFIG]) + struct.pack('>I', int(config)))
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def __set_address(self, address):
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self.__spi.write(bytearray([self.__CMD_ADDR]) + struct.pack('>I', int(address)))
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def __set_read_length(self, length):
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self.__spi.write(bytearray([self.__CMD_READ_LENGTH]) + struct.pack('>I', int(length - 1)))
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def __read_data(self, length):
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return self.__spi.exchange([self.__CMD_READ], int(length * 4))
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def __write_data(self, data):
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self.__spi.write(bytearray([self.__CMD_WRITE]) + data)
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def __cart_reset(self):
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self.__spi.write([self.__CMD_CART_RESET, 0x00, 0x00, 0x00, 0x00])
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def __spi_reset(self):
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self.__spi.write([self.__CMD_SPI_RESET])
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def __reset(self):
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self.__spi_reset()
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self.__cart_reset()
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def __wait_for_read_fill(self, length):
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while (self.__get_status('read_used') < int(length)):
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pass
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def __wait_for_write_space(self, length):
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while ((self.__FIFO_SIZE - self.__get_status('write_used')) < int(length)):
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pass
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def __wait_for_write_completion(self):
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while (self.__get_status('write_used') > 0):
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pass
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def __read_word(self, address):
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self.__set_address(address)
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self.__set_read_length(1)
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self.__wait_for_read_fill(1)
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return struct.unpack('>I', self.__read_data(1))[0]
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def __write_word(self, address, data):
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self.__set_address(address)
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self.__wait_for_write_space(1)
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self.__write_data(struct.pack('>I', data))
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def __flash_operation(self, byte, mode='s', direction='w', select=False, cfg_mode=True):
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return int(
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((1 if cfg_mode else 0) << 12) |
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((1 if mode == 'q' else 0) << 11) |
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((1 if direction == 'w' else 0) << 9) |
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((1 if select else 0) << 8) |
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(byte & 0xFF)
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)
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def __flash_create_operation(self, byte, mode='s', direction='w', select=False, cfg_mode=True):
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return bytearray(struct.pack('>I', self.__flash_operation(byte, mode, direction, select, cfg_mode)))
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def __flash_issue_operation(self, byte, mode='s', direction='w', select=False, cfg_mode=True):
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self.__write_word(self.__FLASH_CFG_ADDRESS, self.__flash_operation(byte, mode, direction, select, cfg_mode))
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return ((self.__read_word(self.__FLASH_CFG_ADDRESS) & 0xFF) if direction == 'r' else 0x00).to_bytes(1, 'big')
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def __flash_exchange(self, command, address=None, data=[], length=0, address_mode='s', write_mode='s', read_mode='s', cfg_mode=True):
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operations = bytearray([])
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operations += self.__flash_create_operation(command)
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if (address != None):
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for byte in bytearray(struct.pack('>I', address))[1:4]:
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operations += self.__flash_create_operation(byte, mode=address_mode)
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for byte in data:
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operations += self.__flash_create_operation(byte, mode=write_mode)
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if (not length):
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operations += self.__flash_create_operation(0x00, select=True, cfg_mode=cfg_mode)
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self.__set_address(self.__FLASH_CFG_ADDRESS)
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self.__write_data(operations)
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self.__wait_for_write_completion()
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data_read = bytearray([])
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for _ in range(length):
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data_read += self.__flash_issue_operation(0x00, mode=read_mode, direction='r')
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if (length > 0):
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self.__flash_issue_operation(0x00, select=True, cfg_mode=cfg_mode)
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return data_read
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def __flash_exit_xip(self):
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self.__flash_exchange(0xFF, data=[0xFF, 0xFF])
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def __flash_enter_xip(self):
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self.__flash_exchange(
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0xEB,
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address=0,
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data=[0xA0, 0x00, 0x00],
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length=1,
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address_mode='q',
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write_mode='q',
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read_mode='q',
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cfg_mode=False
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)
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def __flash_read_status(self):
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return self.__flash_exchange(0x05, length=1)[0]
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def __flash_write_enable(self):
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self.__flash_exchange(0x06)
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def __flash_write_disable(self):
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self.__flash_exchange(0x04)
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def __flash_sector_erase(self, address):
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self.__flash_exchange(0x20, address=address)
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def __flash_chip_erase(self):
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self.__flash_exchange(0xC7)
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self.__flash_exchange(0x60)
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def __flash_program_page(self, address, data):
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self.__flash_exchange(0x32, address=address, data=data, address_mode='s', write_mode='q')
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def __flash_wait_for_not_busy(self):
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while (self.__flash_read_status() & 0x01):
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pass
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def __flash_wait_for_write_enable_latch(self):
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while (not (self.__flash_read_status() & 0x02)):
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pass
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def __calculate_length_in_words(self, length):
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return int((length + 3) / 4)
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def __get_chunk_iterator(self, data, chunk_size):
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for i in range(0, len(data), chunk_size):
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yield (data[i:i + chunk_size], i)
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def print_status(self):
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print(self.__get_status())
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def read_rom(self, length, from_flash=False):
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length_in_words = self.__calculate_length_in_words(length)
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chunk_size = int((self.__FIFO_SIZE_BYTES * 3) / 4)
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data = bytearray([])
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self.__set_address(self.__FLASH_ADDRESS if from_flash else self.__SDRAM_ADDRESS)
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self.__set_read_length(length_in_words)
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while (length > 0):
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current_chunk_size = min(length, chunk_size)
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read_length_in_words = self.__calculate_length_in_words(current_chunk_size)
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self.__wait_for_read_fill(read_length_in_words)
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data += self.__read_data(read_length_in_words)
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length -= current_chunk_size
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if (self.__update_progress): self.__update_progress(len(data))
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return data
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def write_sdram(self, data):
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length = len(data)
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chunk_size = int((self.__FIFO_SIZE_BYTES * 3) / 4)
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self.__set_address(self.__SDRAM_ADDRESS)
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for (chunk, offset) in self.__get_chunk_iterator(data, chunk_size):
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current_chunk_size = min(chunk_size, length - offset)
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self.__wait_for_write_space(self.__calculate_length_in_words(current_chunk_size))
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self.__write_data(chunk)
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if (self.__update_progress): self.__update_progress(offset)
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if (self.__update_progress): self.__update_progress(length)
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self.__wait_for_write_completion()
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def write_flash(self, data):
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self.__set_config(n64_disable=True, address_increment=False)
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self.__flash_exit_xip()
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print('\rErasing Flash, this may take a while...', end=' ')
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self.__flash_write_enable()
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self.__flash_wait_for_write_enable_latch()
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self.__flash_chip_erase()
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self.__flash_wait_for_not_busy()
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print('Done')
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for (page, offset) in self.__get_chunk_iterator(data, self.__FLASH_PAGE_SIZE):
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self.__flash_write_enable()
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self.__flash_wait_for_write_enable_latch()
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self.__flash_program_page(offset, page)
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self.__flash_wait_for_not_busy()
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if (self.__update_progress): self.__update_progress(offset)
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self.__flash_write_disable()
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self.__flash_enter_xip()
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self.__set_config(n64_disable=True, address_increment=True)
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def set_cic_type(self, cic_type=0):
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cic_lut = {
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5101: 0x11,
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6101: 0x12,
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6102: 0x13,
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6103: 0x14,
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6105: 0x15,
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6106: 0x16,
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7101: 0x03,
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7102: 0x02,
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7103: 0x04,
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7105: 0x05,
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7106: 0x06,
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8303: 0x07,
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}
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self.__write_word(self.__CIC_TYPE_ADDRESS, int(cic_lut.get(cic_type) or 0))
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if __name__ == "__main__":
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formatter = lambda prog: argparse.HelpFormatter(prog, max_help_position=30)
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parser = argparse.ArgumentParser(description='Write/Read N64 ROM to SummerCart', formatter_class=formatter)
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parser.add_argument('-s', '--speed', default=30E6, required=False, help='set SPI communication speed (in Hz, 30MHz max)')
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parser.add_argument('-r', '--read', action='store_true', required=False, help='read ROM instead of writing')
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parser.add_argument('-l', '--length', required=False, help='specify ROM length to read (in bytes)', default=2**26)
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parser.add_argument('-f', '--flash', action='store_true', required=False, help='use Flash instead of SDRAM')
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parser.add_argument('-c', '--cic', type=int, required=False, help='set CIC type to use by bootloader')
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parser.add_argument('-q', '--status', action='store_true', required=False, help='just query and print the status word')
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parser.add_argument('rom', help='path to ROM file (only .z64 files are supported)', nargs='?')
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args = parser.parse_args()
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if ((len(sys.argv) == 1) or (not args.rom and (args.read or args.flash))):
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parser.print_help()
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parser.exit()
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bar = progressbar.DataTransferBar()
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def update_progress(length):
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bar.update(length)
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config = {
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'no_init': args.status,
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'spi_speed': args.speed,
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'update_progress': update_progress,
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}
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banger = SummerBanger64(config)
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if (args.cic != None):
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banger.set_cic_type(args.cic)
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elif (args.rom and not args.flash):
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banger.set_cic_type()
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if (args.status):
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banger.print_status()
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elif (args.rom):
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if (args.read):
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with open(args.rom, 'wb') as f:
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length = int(args.length)
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bar.max_value = length
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data = banger.read_rom(length, from_flash=args.flash)
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f.write(data)
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else:
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with open(args.rom, 'rb') as f:
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data = f.read()
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bar.max_value = len(data)
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if (args.flash):
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banger.write_flash(data)
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else:
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banger.write_sdram(data)
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