mirror of
https://github.com/Polprzewodnikowy/SummerCart64.git
synced 2024-11-24 14:46:53 +01:00
5b85b0f661
* [SC64][SW] Added board bring-up via UART header * [SC64][SW] Made I2C in primer stable * [SC64][SW] LCMXO2 primer fixes * [SC64][SW] SC64 primer PC software * [SC64][SW] Added primer.py to release package * [SC64][SW] Fixed FPGA refresh * [SC64][SW] Changed release package contents
51 lines
832 B
Plaintext
51 lines
832 B
Plaintext
MEMORY {
|
|
ram (rwx) : org = 0x20000000, len = 4k
|
|
code (rwx) : org = 0x20001000, len = 4k
|
|
}
|
|
|
|
ENTRY(Reset_Handler)
|
|
|
|
SECTIONS {
|
|
.isr_vector : {
|
|
. = ALIGN(4);
|
|
_header = .;
|
|
KEEP(*(.isr_vector))
|
|
. = ALIGN(4);
|
|
} > code
|
|
|
|
.text : {
|
|
. = ALIGN(4);
|
|
*(.text)
|
|
*(.text*)
|
|
*(.glue_7)
|
|
*(.glue_7t)
|
|
. = ALIGN(4);
|
|
} > code
|
|
|
|
.bss : {
|
|
. = ALIGN(4);
|
|
_sbss = .;
|
|
*(.bss)
|
|
*(.bss*)
|
|
*(COMMON)
|
|
. = ALIGN(4);
|
|
_ebss = .;
|
|
} > ram
|
|
|
|
.data : {
|
|
. = ALIGN(4);
|
|
*(.data)
|
|
*(.data*)
|
|
. = ALIGN(4);
|
|
} > code
|
|
|
|
.rodata : {
|
|
. = ALIGN(4);
|
|
*(.rodata)
|
|
*(.rodata*)
|
|
. = ALIGN(4);
|
|
} > code
|
|
|
|
_estack = ORIGIN(ram) + LENGTH(ram);
|
|
}
|