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19c34a861b
SummerCart64/sw/riscv
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Mateusz Faderewski 19c34a861b slightly optimize sw build
2021-11-18 01:51:43 +00:00
..
src [SC64][FW][SW] Made CPU boot process simpler, UART is now an optional module (#12) 2021-11-16 22:37:48 +01:00
.gitignore [SC64][FW][SW] Complete fw/sw rewrite with RISC-V softcore CPU as flashcart controller (#5) 2021-09-25 20:00:36 +02:00
Makefile slightly optimize sw build 2021-11-18 01:51:43 +00:00
SC64.ld [SC64][FW][SW] Made CPU boot process simpler, UART is now an optional module (#12) 2021-11-16 22:37:48 +01:00