mirror of
https://github.com/Polprzewodnikowy/SummerCart64.git
synced 2024-12-26 04:51:56 +01:00
ff69030643
* isv support + usb/dd improvements
* make room for saves
* update offset
* fixed debug address
* idk
* exception
* ironed out all broken stuff
* cleanup
* return epc fix
* better
* more cleanup
* even more cleanup
* mooore cleanup
* fixed printf
* no assert
* improved docker build, pyft232 instead of pyserial
* fixed displaying long message strings
description test
* just straight cleanup
* smallest cleanup
* PAL
* cpu buffer
* n64 bootloader done
* super slow usb storage reading implemented
* reduced buffer size
* usb gets fast
* little cleanup
* double buffered reads
* removed separate event id
* ISV in hardware finally
* small exception changes
* mac testing
* py spacing
* fsd write, rtc, isv and reset fixes
* fixxx
* good stopping point
* usb fixed?
* pretend we have 128 MB sdram
* backup
* chmod
* test
* test done
* more tests
* user rm
* help
* final fix
* updated component values
* nice asset names
* cic 64dd support
* ddipl enable separation
* pre DMA rewrite, created dedicated buffer memory space, simplified code
* dma rewrite, needs testing
* moved xml
* dd basics
* timing
* 64dd working yet again, isv brought back, dma fixes, usb path rewrite, pc code rewrite
* added usb read functionality, general cleanup
* changed mem addressing
* added fpga flash update access
* added mcu update
* chmod
* little cleanup
* update format and stuff
* fixes
* uninitialized fix
* small fixes
* update fixes
* update stuff done
* fpga update tested
* build time fix
* boot fix
* test timing
* readme test
* test 2
* reports
* testseet
* final
* build test
* forgot
* button and naming
* General cleanup
And multiline commit message test
* Exception screen UI touch ups
* display separation and tests beginning
* pc software update
* pc software done
* timing test
* delete launch.json
* sw fixes
* fixed button hole diameter in shell
* small cleanup, rpi testing
* shell fillet fix, pc rtc printing
* added cfg lock mechanism
* moved lock to cfg address space
* extended ROM and ISV fixes
* preliminary sd card support
* little sd card cleanup
* sd menu fixes
* 5 second limit
* reduced shell thickness
* basic led act blinking
* faster sd menu loading
* inst cache invalidate
* sd card writing is working
* SD card CSD and CID registers
* wait for previous command
* led error codes
* fixed cfg_translate_address use
* 64dd from sd card working
* 64dd speedup and button handling
* delayed address latching cycle - might break other builds, needs testing
* bootloader improvements
* small fixes
* return previous cfg when setting new
* cache stuff
* unfloader debug protocol support
* UNFLoader style debug command line support
* requirements.txt
* shell groove fillet
* reset state inside controller
* fixed fast PI read, added PI R/W fifo debug info
* PI access prioritize
* SD clock stop when RX FIFO is more than half full
* flash erase method change
* CFG error handling, TLOZ MM debug ISV support
* CIC5167 support
* general fixes
* USB unplugged cable handling
* turn off led when changing between error/act modes
* rtc 2 bit clock stop support
* line endings
* Revert "line endings"
This reverts commit d0ddfe5ec7
.
* PI address debug
* readme test
* diagram update
* diagram background
* diagram background
* diagram background
* updated readme
232 lines
9.8 KiB
Systemverilog
232 lines
9.8 KiB
Systemverilog
module memory_arbiter (
|
|
input clk,
|
|
input reset,
|
|
|
|
n64_scb.arbiter n64_scb,
|
|
|
|
mem_bus.memory n64_bus,
|
|
mem_bus.memory cfg_bus,
|
|
mem_bus.memory usb_dma_bus,
|
|
mem_bus.memory sd_dma_bus,
|
|
|
|
mem_bus.controller sdram_mem_bus,
|
|
mem_bus.controller flash_mem_bus,
|
|
mem_bus.controller bram_mem_bus
|
|
);
|
|
|
|
typedef enum bit [1:0] {
|
|
SOURCE_N64,
|
|
SOURCE_CFG,
|
|
SOURCE_USB_DMA,
|
|
SOURCE_SD_DMA
|
|
} e_source_request;
|
|
|
|
logic n64_sdram_request;
|
|
logic cfg_sdram_request;
|
|
logic usb_dma_sdram_request;
|
|
logic sd_dma_sdram_request;
|
|
|
|
logic n64_flash_request;
|
|
logic cfg_flash_request;
|
|
logic usb_dma_flash_request;
|
|
logic sd_dma_flash_request;
|
|
|
|
logic n64_bram_request;
|
|
logic cfg_bram_request;
|
|
logic usb_dma_bram_request;
|
|
logic sd_dma_bram_request;
|
|
|
|
assign n64_sdram_request = n64_bus.request && !n64_bus.address[26];
|
|
assign cfg_sdram_request = !n64_scb.pi_sdram_active && cfg_bus.request && !cfg_bus.address[26];
|
|
assign usb_dma_sdram_request = !n64_scb.pi_sdram_active && usb_dma_bus.request && !usb_dma_bus.address[26];
|
|
assign sd_dma_sdram_request = !n64_scb.pi_sdram_active && sd_dma_bus.request && !sd_dma_bus.address[26];
|
|
|
|
assign n64_flash_request = n64_bus.request && (n64_bus.address[26:24] == 3'b100);
|
|
assign cfg_flash_request = !n64_scb.pi_flash_active && cfg_bus.request && (cfg_bus.address[26:24] == 3'b100);
|
|
assign usb_dma_flash_request = !n64_scb.pi_flash_active && usb_dma_bus.request && (usb_dma_bus.address[26:24] == 3'b100);
|
|
assign sd_dma_flash_request = !n64_scb.pi_flash_active && sd_dma_bus.request && (sd_dma_bus.address[26:24] == 3'b100);
|
|
|
|
assign n64_bram_request = n64_bus.request && (n64_bus.address[26:24] >= 3'b101);
|
|
assign cfg_bram_request = cfg_bus.request && (cfg_bus.address[26:24] >= 3'b101);
|
|
assign usb_dma_bram_request = usb_dma_bus.request && (usb_dma_bus.address[26:24] >= 3'b101);
|
|
assign sd_dma_bram_request = sd_dma_bus.request && (sd_dma_bus.address[26:24] >= 3'b101);
|
|
|
|
e_source_request sdram_source_request;
|
|
|
|
always_ff @(posedge clk) begin
|
|
if (reset) begin
|
|
sdram_mem_bus.request <= 1'b0;
|
|
end else begin
|
|
if (!sdram_mem_bus.request) begin
|
|
sdram_mem_bus.request <= (
|
|
n64_sdram_request ||
|
|
cfg_sdram_request ||
|
|
usb_dma_sdram_request ||
|
|
sd_dma_sdram_request
|
|
);
|
|
|
|
if (n64_sdram_request) begin
|
|
sdram_mem_bus.write <= n64_bus.write;
|
|
sdram_mem_bus.wmask <= n64_bus.wmask;
|
|
sdram_mem_bus.address <= n64_bus.address;
|
|
sdram_mem_bus.wdata <= n64_bus.wdata;
|
|
sdram_source_request <= SOURCE_N64;
|
|
end else if (cfg_sdram_request) begin
|
|
sdram_mem_bus.write <= cfg_bus.write;
|
|
sdram_mem_bus.wmask <= cfg_bus.wmask;
|
|
sdram_mem_bus.address <= cfg_bus.address;
|
|
sdram_mem_bus.wdata <= cfg_bus.wdata;
|
|
sdram_source_request <= SOURCE_CFG;
|
|
end else if (usb_dma_sdram_request) begin
|
|
sdram_mem_bus.write <= usb_dma_bus.write;
|
|
sdram_mem_bus.wmask <= usb_dma_bus.wmask;
|
|
sdram_mem_bus.address <= usb_dma_bus.address;
|
|
sdram_mem_bus.wdata <= usb_dma_bus.wdata;
|
|
sdram_source_request <= SOURCE_USB_DMA;
|
|
end else if (sd_dma_sdram_request) begin
|
|
sdram_mem_bus.write <= sd_dma_bus.write;
|
|
sdram_mem_bus.wmask <= sd_dma_bus.wmask;
|
|
sdram_mem_bus.address <= sd_dma_bus.address;
|
|
sdram_mem_bus.wdata <= sd_dma_bus.wdata;
|
|
sdram_source_request <= SOURCE_SD_DMA;
|
|
end
|
|
end
|
|
|
|
if (sdram_mem_bus.ack) begin
|
|
sdram_mem_bus.request <= 1'b0;
|
|
end
|
|
end
|
|
end
|
|
|
|
e_source_request flash_source_request;
|
|
|
|
always_ff @(posedge clk) begin
|
|
if (reset) begin
|
|
flash_mem_bus.request <= 1'b0;
|
|
end else begin
|
|
if (!flash_mem_bus.request) begin
|
|
flash_mem_bus.request <= (
|
|
n64_flash_request ||
|
|
cfg_flash_request ||
|
|
usb_dma_flash_request ||
|
|
sd_dma_flash_request
|
|
);
|
|
|
|
if (n64_flash_request) begin
|
|
flash_mem_bus.write <= n64_bus.write;
|
|
flash_mem_bus.wmask <= n64_bus.wmask;
|
|
flash_mem_bus.address <= n64_bus.address;
|
|
flash_mem_bus.wdata <= n64_bus.wdata;
|
|
flash_source_request <= SOURCE_N64;
|
|
end else if (cfg_flash_request) begin
|
|
flash_mem_bus.write <= cfg_bus.write;
|
|
flash_mem_bus.wmask <= cfg_bus.wmask;
|
|
flash_mem_bus.address <= cfg_bus.address;
|
|
flash_mem_bus.wdata <= cfg_bus.wdata;
|
|
flash_source_request <= SOURCE_CFG;
|
|
end else if (usb_dma_flash_request) begin
|
|
flash_mem_bus.write <= usb_dma_bus.write;
|
|
flash_mem_bus.wmask <= usb_dma_bus.wmask;
|
|
flash_mem_bus.address <= usb_dma_bus.address;
|
|
flash_mem_bus.wdata <= usb_dma_bus.wdata;
|
|
flash_source_request <= SOURCE_USB_DMA;
|
|
end else if (sd_dma_flash_request) begin
|
|
flash_mem_bus.write <= sd_dma_bus.write;
|
|
flash_mem_bus.wmask <= sd_dma_bus.wmask;
|
|
flash_mem_bus.address <= sd_dma_bus.address;
|
|
flash_mem_bus.wdata <= sd_dma_bus.wdata;
|
|
flash_source_request <= SOURCE_SD_DMA;
|
|
end
|
|
end
|
|
|
|
if (flash_mem_bus.ack) begin
|
|
flash_mem_bus.request <= 1'b0;
|
|
end
|
|
end
|
|
end
|
|
|
|
e_source_request bram_source_request;
|
|
|
|
always_ff @(posedge clk) begin
|
|
if (reset) begin
|
|
bram_mem_bus.request <= 1'b0;
|
|
end else begin
|
|
if (!bram_mem_bus.request) begin
|
|
bram_mem_bus.request <= (
|
|
n64_bram_request ||
|
|
cfg_bram_request ||
|
|
usb_dma_bram_request ||
|
|
sd_dma_bram_request
|
|
);
|
|
|
|
if (n64_bram_request) begin
|
|
bram_mem_bus.write <= n64_bus.write;
|
|
bram_mem_bus.wmask <= n64_bus.wmask;
|
|
bram_mem_bus.address <= n64_bus.address;
|
|
bram_mem_bus.wdata <= n64_bus.wdata;
|
|
bram_source_request <= SOURCE_N64;
|
|
end else if (cfg_bram_request) begin
|
|
bram_mem_bus.write <= cfg_bus.write;
|
|
bram_mem_bus.wmask <= cfg_bus.wmask;
|
|
bram_mem_bus.address <= cfg_bus.address;
|
|
bram_mem_bus.wdata <= cfg_bus.wdata;
|
|
bram_source_request <= SOURCE_CFG;
|
|
end else if (usb_dma_bram_request) begin
|
|
bram_mem_bus.write <= usb_dma_bus.write;
|
|
bram_mem_bus.wmask <= usb_dma_bus.wmask;
|
|
bram_mem_bus.address <= usb_dma_bus.address;
|
|
bram_mem_bus.wdata <= usb_dma_bus.wdata;
|
|
bram_source_request <= SOURCE_USB_DMA;
|
|
end else if (sd_dma_bram_request) begin
|
|
bram_mem_bus.write <= sd_dma_bus.write;
|
|
bram_mem_bus.wmask <= sd_dma_bus.wmask;
|
|
bram_mem_bus.address <= sd_dma_bus.address;
|
|
bram_mem_bus.wdata <= sd_dma_bus.wdata;
|
|
bram_source_request <= SOURCE_SD_DMA;
|
|
end
|
|
end
|
|
|
|
if (bram_mem_bus.ack) begin
|
|
bram_mem_bus.request <= 1'b0;
|
|
end
|
|
end
|
|
end
|
|
|
|
always_comb begin
|
|
n64_bus.ack = (
|
|
((sdram_source_request == SOURCE_N64) && sdram_mem_bus.ack) ||
|
|
((flash_source_request == SOURCE_N64) && flash_mem_bus.ack) ||
|
|
((bram_source_request == SOURCE_N64) && bram_mem_bus.ack)
|
|
);
|
|
cfg_bus.ack = (
|
|
((sdram_source_request == SOURCE_CFG) && sdram_mem_bus.ack) ||
|
|
((flash_source_request == SOURCE_CFG) && flash_mem_bus.ack) ||
|
|
((bram_source_request == SOURCE_CFG) && bram_mem_bus.ack)
|
|
);
|
|
usb_dma_bus.ack = (
|
|
((sdram_source_request == SOURCE_USB_DMA) && sdram_mem_bus.ack) ||
|
|
((flash_source_request == SOURCE_USB_DMA) && flash_mem_bus.ack) ||
|
|
((bram_source_request == SOURCE_USB_DMA) && bram_mem_bus.ack)
|
|
);
|
|
sd_dma_bus.ack = (
|
|
((sdram_source_request == SOURCE_SD_DMA) && sdram_mem_bus.ack) ||
|
|
((flash_source_request == SOURCE_SD_DMA) && flash_mem_bus.ack) ||
|
|
((bram_source_request == SOURCE_SD_DMA) && bram_mem_bus.ack)
|
|
);
|
|
|
|
n64_bus.rdata = n64_bram_request ? bram_mem_bus.rdata :
|
|
n64_flash_request ? flash_mem_bus.rdata :
|
|
sdram_mem_bus.rdata;
|
|
cfg_bus.rdata = cfg_bram_request ? bram_mem_bus.rdata :
|
|
cfg_flash_request ? flash_mem_bus.rdata :
|
|
sdram_mem_bus.rdata;
|
|
usb_dma_bus.rdata = usb_dma_bram_request ? bram_mem_bus.rdata :
|
|
usb_dma_flash_request ? flash_mem_bus.rdata :
|
|
sdram_mem_bus.rdata;
|
|
sd_dma_bus.rdata = sd_dma_bram_request ? bram_mem_bus.rdata :
|
|
sd_dma_flash_request ? flash_mem_bus.rdata :
|
|
sdram_mem_bus.rdata;
|
|
end
|
|
|
|
endmodule
|