mirror of
https://github.com/Polprzewodnikowy/SummerCart64.git
synced 2024-11-29 16:54:14 +01:00
5b85b0f661
* [SC64][SW] Added board bring-up via UART header * [SC64][SW] Made I2C in primer stable * [SC64][SW] LCMXO2 primer fixes * [SC64][SW] SC64 primer PC software * [SC64][SW] Added primer.py to release package * [SC64][SW] Fixed FPGA refresh * [SC64][SW] Changed release package contents
54 lines
894 B
ArmAsm
54 lines
894 B
ArmAsm
.syntax unified
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.cpu cortex-m0plus
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.fpu softvfp
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.thumb
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.section .text.Reset_Handler
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.type Reset_Handler, %function
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Reset_Handler:
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.global Reset_Handler
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ldr r0, =_estack
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msr msp, r0
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init_bss:
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ldr r2, =_sbss
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ldr r4, =_ebss
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movs r3, #0
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b 2f
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1:
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str r3, [r2]
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adds r2, r2, #4
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2:
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cmp r2, r4
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bcc 1b
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run:
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ldr r0, =_header
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bl hw_set_vector_table
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bl primer
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loop:
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b loop
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.section .text.Default_Handler, "ax", %progbits
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Default_Handler:
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.global Default_Handler
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b Default_Handler
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.section .isr_vector, "a", %progbits
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.type g_pfnVectors, %object
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g_pfnVectors:
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.global g_pfnVectors
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.word _estack
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.word Reset_Handler
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.word NMI_Handler
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.word HardFault_Handler
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.weak NMI_Handler
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.thumb_set NMI_Handler, Default_Handler
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.weak HardFault_Handler
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.thumb_set HardFault_Handler, Default_Handler
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