mirror of
https://github.com/Polprzewodnikowy/SummerCart64.git
synced 2024-11-25 23:24:15 +01:00
771 lines
16 KiB
C
771 lines
16 KiB
C
/*
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* PicoSoC - A simple example SoC using PicoRV32
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*
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* Copyright (C) 2017 Clifford Wolf <clifford@clifford.at>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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#include <stdint.h>
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#include <stdbool.h>
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#ifdef ICEBREAKER
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# define MEM_TOTAL 0x20000 /* 128 KB */
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#elif HX8KDEMO
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# define MEM_TOTAL 0x200 /* 2 KB */
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#else
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# error "Set -DICEBREAKER or -DHX8KDEMO when compiling firmware.c"
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#endif
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// a pointer to this is a null pointer, but the compiler does not
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// know that because "sram" is a linker symbol from sections.lds.
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extern uint32_t sram;
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#define reg_spictrl (*(volatile uint32_t*)0x02000000)
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#define reg_uart_clkdiv (*(volatile uint32_t*)0x02000004)
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#define reg_uart_data (*(volatile uint32_t*)0x02000008)
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#define reg_leds (*(volatile uint32_t*)0x03000000)
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// --------------------------------------------------------
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extern uint32_t flashio_worker_begin;
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extern uint32_t flashio_worker_end;
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void flashio(uint8_t *data, int len, uint8_t wrencmd)
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{
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uint32_t func[&flashio_worker_end - &flashio_worker_begin];
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uint32_t *src_ptr = &flashio_worker_begin;
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uint32_t *dst_ptr = func;
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while (src_ptr != &flashio_worker_end)
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*(dst_ptr++) = *(src_ptr++);
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((void(*)(uint8_t*, uint32_t, uint32_t))func)(data, len, wrencmd);
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}
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#ifdef HX8KDEMO
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void set_flash_qspi_flag()
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{
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uint8_t buffer[8];
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uint32_t addr_cr1v = 0x800002;
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// Read Any Register (RDAR 65h)
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buffer[0] = 0x65;
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buffer[1] = addr_cr1v >> 16;
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buffer[2] = addr_cr1v >> 8;
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buffer[3] = addr_cr1v;
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buffer[4] = 0; // dummy
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buffer[5] = 0; // rdata
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flashio(buffer, 6, 0);
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uint8_t cr1v = buffer[5];
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// Write Enable (WREN 06h) + Write Any Register (WRAR 71h)
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buffer[0] = 0x71;
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buffer[1] = addr_cr1v >> 16;
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buffer[2] = addr_cr1v >> 8;
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buffer[3] = addr_cr1v;
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buffer[4] = cr1v | 2; // Enable QSPI
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flashio(buffer, 5, 0x06);
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}
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void set_flash_latency(uint8_t value)
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{
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reg_spictrl = (reg_spictrl & ~0x007f0000) | ((value & 15) << 16);
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uint32_t addr = 0x800004;
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uint8_t buffer_wr[5] = {0x71, addr >> 16, addr >> 8, addr, 0x70 | value};
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flashio(buffer_wr, 5, 0x06);
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}
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void set_flash_mode_spi()
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{
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reg_spictrl = (reg_spictrl & ~0x00700000) | 0x00000000;
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}
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void set_flash_mode_dual()
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{
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reg_spictrl = (reg_spictrl & ~0x00700000) | 0x00400000;
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}
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void set_flash_mode_quad()
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{
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reg_spictrl = (reg_spictrl & ~0x00700000) | 0x00200000;
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}
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void set_flash_mode_qddr()
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{
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reg_spictrl = (reg_spictrl & ~0x00700000) | 0x00600000;
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}
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#endif
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#ifdef ICEBREAKER
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void set_flash_qspi_flag()
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{
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uint8_t buffer[8];
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// Read Configuration Registers (RDCR1 35h)
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buffer[0] = 0x35;
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buffer[1] = 0x00; // rdata
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flashio(buffer, 2, 0);
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uint8_t sr2 = buffer[1];
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// Write Enable Volatile (50h) + Write Status Register 2 (31h)
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buffer[0] = 0x31;
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buffer[1] = sr2 | 2; // Enable QSPI
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flashio(buffer, 2, 0x50);
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}
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void set_flash_mode_spi()
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{
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reg_spictrl = (reg_spictrl & ~0x007f0000) | 0x00000000;
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}
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void set_flash_mode_dual()
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{
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reg_spictrl = (reg_spictrl & ~0x007f0000) | 0x00400000;
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}
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void set_flash_mode_quad()
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{
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reg_spictrl = (reg_spictrl & ~0x007f0000) | 0x00240000;
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}
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void set_flash_mode_qddr()
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{
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reg_spictrl = (reg_spictrl & ~0x007f0000) | 0x00670000;
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}
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void enable_flash_crm()
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{
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reg_spictrl |= 0x00100000;
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}
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#endif
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// --------------------------------------------------------
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void putchar(char c)
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{
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if (c == '\n')
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putchar('\r');
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reg_uart_data = c;
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}
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void print(const char *p)
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{
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while (*p)
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putchar(*(p++));
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}
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void print_hex(uint32_t v, int digits)
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{
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for (int i = 7; i >= 0; i--) {
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char c = "0123456789abcdef"[(v >> (4*i)) & 15];
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if (c == '0' && i >= digits) continue;
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putchar(c);
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digits = i;
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}
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}
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void print_dec(uint32_t v)
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{
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if (v >= 1000) {
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print(">=1000");
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return;
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}
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if (v >= 900) { putchar('9'); v -= 900; }
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else if (v >= 800) { putchar('8'); v -= 800; }
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else if (v >= 700) { putchar('7'); v -= 700; }
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else if (v >= 600) { putchar('6'); v -= 600; }
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else if (v >= 500) { putchar('5'); v -= 500; }
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else if (v >= 400) { putchar('4'); v -= 400; }
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else if (v >= 300) { putchar('3'); v -= 300; }
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else if (v >= 200) { putchar('2'); v -= 200; }
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else if (v >= 100) { putchar('1'); v -= 100; }
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if (v >= 90) { putchar('9'); v -= 90; }
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else if (v >= 80) { putchar('8'); v -= 80; }
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else if (v >= 70) { putchar('7'); v -= 70; }
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else if (v >= 60) { putchar('6'); v -= 60; }
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else if (v >= 50) { putchar('5'); v -= 50; }
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else if (v >= 40) { putchar('4'); v -= 40; }
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else if (v >= 30) { putchar('3'); v -= 30; }
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else if (v >= 20) { putchar('2'); v -= 20; }
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else if (v >= 10) { putchar('1'); v -= 10; }
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if (v >= 9) { putchar('9'); v -= 9; }
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else if (v >= 8) { putchar('8'); v -= 8; }
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else if (v >= 7) { putchar('7'); v -= 7; }
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else if (v >= 6) { putchar('6'); v -= 6; }
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else if (v >= 5) { putchar('5'); v -= 5; }
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else if (v >= 4) { putchar('4'); v -= 4; }
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else if (v >= 3) { putchar('3'); v -= 3; }
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else if (v >= 2) { putchar('2'); v -= 2; }
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else if (v >= 1) { putchar('1'); v -= 1; }
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else putchar('0');
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}
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char getchar_prompt(char *prompt)
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{
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int32_t c = -1;
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uint32_t cycles_begin, cycles_now, cycles;
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__asm__ volatile ("rdcycle %0" : "=r"(cycles_begin));
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reg_leds = ~0;
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if (prompt)
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print(prompt);
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while (c == -1) {
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__asm__ volatile ("rdcycle %0" : "=r"(cycles_now));
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cycles = cycles_now - cycles_begin;
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if (cycles > 12000000) {
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if (prompt)
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print(prompt);
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cycles_begin = cycles_now;
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reg_leds = ~reg_leds;
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}
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c = reg_uart_data;
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}
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reg_leds = 0;
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return c;
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}
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char getchar()
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{
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return getchar_prompt(0);
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}
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void cmd_print_spi_state()
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{
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print("SPI State:\n");
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print(" LATENCY ");
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print_dec((reg_spictrl >> 16) & 15);
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print("\n");
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print(" DDR ");
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if ((reg_spictrl & (1 << 22)) != 0)
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print("ON\n");
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else
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print("OFF\n");
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print(" QSPI ");
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if ((reg_spictrl & (1 << 21)) != 0)
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print("ON\n");
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else
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print("OFF\n");
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print(" CRM ");
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if ((reg_spictrl & (1 << 20)) != 0)
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print("ON\n");
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else
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print("OFF\n");
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}
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uint32_t xorshift32(uint32_t *state)
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{
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/* Algorithm "xor" from p. 4 of Marsaglia, "Xorshift RNGs" */
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uint32_t x = *state;
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x ^= x << 13;
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x ^= x >> 17;
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x ^= x << 5;
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*state = x;
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return x;
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}
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void cmd_memtest()
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{
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int cyc_count = 5;
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int stride = 256;
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uint32_t state;
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volatile uint32_t *base_word = (uint32_t *) 0;
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volatile uint8_t *base_byte = (uint8_t *) 0;
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print("Running memtest ");
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// Walk in stride increments, word access
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for (int i = 1; i <= cyc_count; i++) {
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state = i;
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for (int word = 0; word < MEM_TOTAL / sizeof(int); word += stride) {
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*(base_word + word) = xorshift32(&state);
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}
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state = i;
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for (int word = 0; word < MEM_TOTAL / sizeof(int); word += stride) {
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if (*(base_word + word) != xorshift32(&state)) {
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print(" ***FAILED WORD*** at ");
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print_hex(4*word, 4);
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print("\n");
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return;
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}
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}
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print(".");
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}
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// Byte access
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for (int byte = 0; byte < 128; byte++) {
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*(base_byte + byte) = (uint8_t) byte;
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}
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for (int byte = 0; byte < 128; byte++) {
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if (*(base_byte + byte) != (uint8_t) byte) {
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print(" ***FAILED BYTE*** at ");
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print_hex(byte, 4);
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print("\n");
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return;
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}
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}
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print(" passed\n");
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}
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// --------------------------------------------------------
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void cmd_read_flash_id()
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{
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uint8_t buffer[17] = { 0x9F, /* zeros */ };
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flashio(buffer, 17, 0);
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for (int i = 1; i <= 16; i++) {
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putchar(' ');
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print_hex(buffer[i], 2);
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}
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putchar('\n');
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}
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// --------------------------------------------------------
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#ifdef HX8KDEMO
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uint8_t cmd_read_flash_regs_print(uint32_t addr, const char *name)
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{
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set_flash_latency(8);
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uint8_t buffer[6] = {0x65, addr >> 16, addr >> 8, addr, 0, 0};
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flashio(buffer, 6, 0);
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print("0x");
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print_hex(addr, 6);
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print(" ");
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print(name);
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print(" 0x");
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print_hex(buffer[5], 2);
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print("\n");
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return buffer[5];
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}
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void cmd_read_flash_regs()
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{
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print("\n");
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uint8_t sr1v = cmd_read_flash_regs_print(0x800000, "SR1V");
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uint8_t sr2v = cmd_read_flash_regs_print(0x800001, "SR2V");
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uint8_t cr1v = cmd_read_flash_regs_print(0x800002, "CR1V");
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uint8_t cr2v = cmd_read_flash_regs_print(0x800003, "CR2V");
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uint8_t cr3v = cmd_read_flash_regs_print(0x800004, "CR3V");
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uint8_t vdlp = cmd_read_flash_regs_print(0x800005, "VDLP");
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}
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#endif
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#ifdef ICEBREAKER
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uint8_t cmd_read_flash_reg(uint8_t cmd)
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{
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uint8_t buffer[2] = {cmd, 0};
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flashio(buffer, 2, 0);
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return buffer[1];
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}
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void print_reg_bit(int val, const char *name)
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{
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for (int i = 0; i < 12; i++) {
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if (*name == 0)
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putchar(' ');
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else
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putchar(*(name++));
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}
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putchar(val ? '1' : '0');
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putchar('\n');
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}
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void cmd_read_flash_regs()
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{
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putchar('\n');
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uint8_t sr1 = cmd_read_flash_reg(0x05);
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uint8_t sr2 = cmd_read_flash_reg(0x35);
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uint8_t sr3 = cmd_read_flash_reg(0x15);
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print_reg_bit(sr1 & 0x01, "S0 (BUSY)");
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print_reg_bit(sr1 & 0x02, "S1 (WEL)");
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print_reg_bit(sr1 & 0x04, "S2 (BP0)");
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print_reg_bit(sr1 & 0x08, "S3 (BP1)");
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print_reg_bit(sr1 & 0x10, "S4 (BP2)");
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print_reg_bit(sr1 & 0x20, "S5 (TB)");
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print_reg_bit(sr1 & 0x40, "S6 (SEC)");
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print_reg_bit(sr1 & 0x80, "S7 (SRP)");
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putchar('\n');
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print_reg_bit(sr2 & 0x01, "S8 (SRL)");
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print_reg_bit(sr2 & 0x02, "S9 (QE)");
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print_reg_bit(sr2 & 0x04, "S10 ----");
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print_reg_bit(sr2 & 0x08, "S11 (LB1)");
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print_reg_bit(sr2 & 0x10, "S12 (LB2)");
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print_reg_bit(sr2 & 0x20, "S13 (LB3)");
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print_reg_bit(sr2 & 0x40, "S14 (CMP)");
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print_reg_bit(sr2 & 0x80, "S15 (SUS)");
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putchar('\n');
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print_reg_bit(sr3 & 0x01, "S16 ----");
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print_reg_bit(sr3 & 0x02, "S17 ----");
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print_reg_bit(sr3 & 0x04, "S18 (WPS)");
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print_reg_bit(sr3 & 0x08, "S19 ----");
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print_reg_bit(sr3 & 0x10, "S20 ----");
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print_reg_bit(sr3 & 0x20, "S21 (DRV0)");
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print_reg_bit(sr3 & 0x40, "S22 (DRV1)");
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print_reg_bit(sr3 & 0x80, "S23 (HOLD)");
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putchar('\n');
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}
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#endif
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// --------------------------------------------------------
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uint32_t cmd_benchmark(bool verbose, uint32_t *instns_p)
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{
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uint8_t data[256];
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uint32_t *words = (void*)data;
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uint32_t x32 = 314159265;
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uint32_t cycles_begin, cycles_end;
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uint32_t instns_begin, instns_end;
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__asm__ volatile ("rdcycle %0" : "=r"(cycles_begin));
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__asm__ volatile ("rdinstret %0" : "=r"(instns_begin));
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for (int i = 0; i < 20; i++)
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{
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for (int k = 0; k < 256; k++)
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{
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x32 ^= x32 << 13;
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x32 ^= x32 >> 17;
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x32 ^= x32 << 5;
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data[k] = x32;
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}
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for (int k = 0, p = 0; k < 256; k++)
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{
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if (data[k])
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data[p++] = k;
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}
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for (int k = 0, p = 0; k < 64; k++)
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{
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x32 = x32 ^ words[k];
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}
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}
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__asm__ volatile ("rdcycle %0" : "=r"(cycles_end));
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__asm__ volatile ("rdinstret %0" : "=r"(instns_end));
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if (verbose)
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{
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print("Cycles: 0x");
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print_hex(cycles_end - cycles_begin, 8);
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putchar('\n');
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print("Instns: 0x");
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print_hex(instns_end - instns_begin, 8);
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putchar('\n');
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print("Chksum: 0x");
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print_hex(x32, 8);
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putchar('\n');
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}
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if (instns_p)
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*instns_p = instns_end - instns_begin;
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return cycles_end - cycles_begin;
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}
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// --------------------------------------------------------
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#ifdef HX8KDEMO
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void cmd_benchmark_all()
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{
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uint32_t instns = 0;
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print("default ");
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reg_spictrl = (reg_spictrl & ~0x00700000) | 0x00000000;
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print(": ");
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print_hex(cmd_benchmark(false, &instns), 8);
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putchar('\n');
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for (int i = 8; i > 0; i--)
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{
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print("dspi-");
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print_dec(i);
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print(" ");
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set_flash_latency(i);
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reg_spictrl = (reg_spictrl & ~0x00700000) | 0x00400000;
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print(": ");
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print_hex(cmd_benchmark(false, &instns), 8);
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putchar('\n');
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}
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for (int i = 8; i > 0; i--)
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{
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print("dspi-crm-");
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print_dec(i);
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print(" ");
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set_flash_latency(i);
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reg_spictrl = (reg_spictrl & ~0x00700000) | 0x00500000;
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print(": ");
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print_hex(cmd_benchmark(false, &instns), 8);
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putchar('\n');
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}
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for (int i = 8; i > 0; i--)
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{
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print("qspi-");
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print_dec(i);
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print(" ");
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set_flash_latency(i);
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reg_spictrl = (reg_spictrl & ~0x00700000) | 0x00200000;
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print(": ");
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print_hex(cmd_benchmark(false, &instns), 8);
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putchar('\n');
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}
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for (int i = 8; i > 0; i--)
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{
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print("qspi-crm-");
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print_dec(i);
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print(" ");
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set_flash_latency(i);
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reg_spictrl = (reg_spictrl & ~0x00700000) | 0x00300000;
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print(": ");
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print_hex(cmd_benchmark(false, &instns), 8);
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putchar('\n');
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}
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for (int i = 8; i > 0; i--)
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{
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print("qspi-ddr-");
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print_dec(i);
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print(" ");
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set_flash_latency(i);
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reg_spictrl = (reg_spictrl & ~0x00700000) | 0x00600000;
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print(": ");
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print_hex(cmd_benchmark(false, &instns), 8);
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putchar('\n');
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}
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for (int i = 8; i > 0; i--)
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{
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print("qspi-ddr-crm-");
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print_dec(i);
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print(" ");
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set_flash_latency(i);
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reg_spictrl = (reg_spictrl & ~0x00700000) | 0x00700000;
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print(": ");
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print_hex(cmd_benchmark(false, &instns), 8);
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putchar('\n');
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}
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print("instns : ");
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print_hex(instns, 8);
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putchar('\n');
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}
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#endif
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#ifdef ICEBREAKER
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void cmd_benchmark_all()
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{
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uint32_t instns = 0;
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print("default ");
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set_flash_mode_spi();
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print_hex(cmd_benchmark(false, &instns), 8);
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putchar('\n');
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print("dual ");
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set_flash_mode_dual();
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print_hex(cmd_benchmark(false, &instns), 8);
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putchar('\n');
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// print("dual-crm ");
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// enable_flash_crm();
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// print_hex(cmd_benchmark(false, &instns), 8);
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// putchar('\n');
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print("quad ");
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set_flash_mode_quad();
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print_hex(cmd_benchmark(false, &instns), 8);
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putchar('\n');
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print("quad-crm ");
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enable_flash_crm();
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print_hex(cmd_benchmark(false, &instns), 8);
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putchar('\n');
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print("qddr ");
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set_flash_mode_qddr();
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print_hex(cmd_benchmark(false, &instns), 8);
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putchar('\n');
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print("qddr-crm ");
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enable_flash_crm();
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print_hex(cmd_benchmark(false, &instns), 8);
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putchar('\n');
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}
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#endif
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void cmd_echo()
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{
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print("Return to menu by sending '!'\n\n");
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char c;
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while ((c = getchar()) != '!')
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putchar(c);
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}
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// --------------------------------------------------------
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void main()
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{
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reg_leds = 31;
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reg_uart_clkdiv = 104;
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print("Booting..\n");
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reg_leds = 63;
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set_flash_qspi_flag();
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reg_leds = 127;
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while (getchar_prompt("Press ENTER to continue..\n") != '\r') { /* wait */ }
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print("\n");
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print(" ____ _ ____ ____\n");
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print(" | _ \\(_) ___ ___/ ___| ___ / ___|\n");
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print(" | |_) | |/ __/ _ \\___ \\ / _ \\| |\n");
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print(" | __/| | (_| (_) |__) | (_) | |___\n");
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print(" |_| |_|\\___\\___/____/ \\___/ \\____|\n");
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print("\n");
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print("Total memory: ");
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print_dec(MEM_TOTAL / 1024);
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print(" KiB\n");
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print("\n");
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//cmd_memtest(); // test overwrites bss and data memory
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print("\n");
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cmd_print_spi_state();
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print("\n");
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while (1)
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{
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print("\n");
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print("Select an action:\n");
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print("\n");
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print(" [1] Read SPI Flash ID\n");
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print(" [2] Read SPI Config Regs\n");
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print(" [3] Switch to default mode\n");
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print(" [4] Switch to Dual I/O mode\n");
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print(" [5] Switch to Quad I/O mode\n");
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print(" [6] Switch to Quad DDR mode\n");
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print(" [7] Toggle continuous read mode\n");
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print(" [9] Run simplistic benchmark\n");
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print(" [0] Benchmark all configs\n");
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print(" [M] Run Memtest\n");
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print(" [S] Print SPI state\n");
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print(" [e] Echo UART\n");
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print("\n");
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for (int rep = 10; rep > 0; rep--)
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{
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print("Command> ");
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char cmd = getchar();
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if (cmd > 32 && cmd < 127)
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putchar(cmd);
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print("\n");
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switch (cmd)
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{
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case '1':
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cmd_read_flash_id();
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break;
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case '2':
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cmd_read_flash_regs();
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break;
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case '3':
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set_flash_mode_spi();
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break;
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case '4':
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set_flash_mode_dual();
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break;
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case '5':
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set_flash_mode_quad();
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break;
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case '6':
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set_flash_mode_qddr();
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break;
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case '7':
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reg_spictrl = reg_spictrl ^ 0x00100000;
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break;
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case '9':
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cmd_benchmark(true, 0);
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break;
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case '0':
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cmd_benchmark_all();
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break;
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case 'M':
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cmd_memtest();
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break;
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case 'S':
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cmd_print_spi_state();
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break;
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case 'e':
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cmd_echo();
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break;
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default:
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continue;
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}
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break;
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}
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}
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}
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