| .. |
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cpu_bus.sv
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[SC64][FW][SW] Complete fw/sw rewrite with RISC-V softcore CPU as flashcart controller (#5)
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2021-09-25 20:00:36 +02:00 |
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cpu_cfg.sv
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[SC64][FW][SW] Added escape mechanism in USB, changed N64 boot procedure, added "fake SD card through USB" feature, rewritten PC communication software (#13)
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2021-12-10 17:36:30 +01:00 |
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cpu_dma.sv
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[SC64][FW][SW] Complete fw/sw rewrite with RISC-V softcore CPU as flashcart controller (#5)
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2021-09-25 20:00:36 +02:00 |
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cpu_flash.sv
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[SC64][FW][SW] Load CPU software directly from embedded flash in FPGA (#9)
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2021-10-26 23:44:09 +02:00 |
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cpu_flashram.sv
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[SC64][FW][SW] Complete fw/sw rewrite with RISC-V softcore CPU as flashcart controller (#5)
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2021-09-25 20:00:36 +02:00 |
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cpu_gpio.sv
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[SC64][FW][SW] Complete fw/sw rewrite with RISC-V softcore CPU as flashcart controller (#5)
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2021-09-25 20:00:36 +02:00 |
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cpu_i2c.sv
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[SC64][FW][SW] Complete fw/sw rewrite with RISC-V softcore CPU as flashcart controller (#5)
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2021-09-25 20:00:36 +02:00 |
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cpu_ram.sv
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[SC64][FW][SW] Complete fw/sw rewrite with RISC-V softcore CPU as flashcart controller (#5)
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2021-09-25 20:00:36 +02:00 |
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cpu_sdram.sv
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[SC64][FW][SW] Complete fw/sw rewrite with RISC-V softcore CPU as flashcart controller (#5)
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2021-09-25 20:00:36 +02:00 |
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cpu_si.sv
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[SC64][FW][SW] Complete fw/sw rewrite with RISC-V softcore CPU as flashcart controller (#5)
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2021-09-25 20:00:36 +02:00 |
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cpu_soc.sv
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[SC64][FW][SW] Made CPU boot process simpler, UART is now an optional module (#12)
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2021-11-16 22:37:48 +01:00 |
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cpu_uart.sv
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[SC64][FW][SW] Updated project for Quartus Lite 21.1, reworked build script, minor fixes in USB and CFG modules (#11)
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2021-11-10 02:05:51 +01:00 |
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cpu_usb.sv
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[SC64][FW][SW] Added escape mechanism in USB, changed N64 boot procedure, added "fake SD card through USB" feature, rewritten PC communication software (#13)
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2021-12-10 17:36:30 +01:00 |
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cpu_wrapper.sv
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[SC64][FW][SW] Made CPU boot process simpler, UART is now an optional module (#12)
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2021-11-16 22:37:48 +01:00 |
