mirror of
https://github.com/Polprzewodnikowy/SummerCart64.git
synced 2024-11-25 23:24:15 +01:00
ff69030643
* isv support + usb/dd improvements
* make room for saves
* update offset
* fixed debug address
* idk
* exception
* ironed out all broken stuff
* cleanup
* return epc fix
* better
* more cleanup
* even more cleanup
* mooore cleanup
* fixed printf
* no assert
* improved docker build, pyft232 instead of pyserial
* fixed displaying long message strings
description test
* just straight cleanup
* smallest cleanup
* PAL
* cpu buffer
* n64 bootloader done
* super slow usb storage reading implemented
* reduced buffer size
* usb gets fast
* little cleanup
* double buffered reads
* removed separate event id
* ISV in hardware finally
* small exception changes
* mac testing
* py spacing
* fsd write, rtc, isv and reset fixes
* fixxx
* good stopping point
* usb fixed?
* pretend we have 128 MB sdram
* backup
* chmod
* test
* test done
* more tests
* user rm
* help
* final fix
* updated component values
* nice asset names
* cic 64dd support
* ddipl enable separation
* pre DMA rewrite, created dedicated buffer memory space, simplified code
* dma rewrite, needs testing
* moved xml
* dd basics
* timing
* 64dd working yet again, isv brought back, dma fixes, usb path rewrite, pc code rewrite
* added usb read functionality, general cleanup
* changed mem addressing
* added fpga flash update access
* added mcu update
* chmod
* little cleanup
* update format and stuff
* fixes
* uninitialized fix
* small fixes
* update fixes
* update stuff done
* fpga update tested
* build time fix
* boot fix
* test timing
* readme test
* test 2
* reports
* testseet
* final
* build test
* forgot
* button and naming
* General cleanup
And multiline commit message test
* Exception screen UI touch ups
* display separation and tests beginning
* pc software update
* pc software done
* timing test
* delete launch.json
* sw fixes
* fixed button hole diameter in shell
* small cleanup, rpi testing
* shell fillet fix, pc rtc printing
* added cfg lock mechanism
* moved lock to cfg address space
* extended ROM and ISV fixes
* preliminary sd card support
* little sd card cleanup
* sd menu fixes
* 5 second limit
* reduced shell thickness
* basic led act blinking
* faster sd menu loading
* inst cache invalidate
* sd card writing is working
* SD card CSD and CID registers
* wait for previous command
* led error codes
* fixed cfg_translate_address use
* 64dd from sd card working
* 64dd speedup and button handling
* delayed address latching cycle - might break other builds, needs testing
* bootloader improvements
* small fixes
* return previous cfg when setting new
* cache stuff
* unfloader debug protocol support
* UNFLoader style debug command line support
* requirements.txt
* shell groove fillet
* reset state inside controller
* fixed fast PI read, added PI R/W fifo debug info
* PI access prioritize
* SD clock stop when RX FIFO is more than half full
* flash erase method change
* CFG error handling, TLOZ MM debug ISV support
* CIC5167 support
* general fixes
* USB unplugged cable handling
* turn off led when changing between error/act modes
* rtc 2 bit clock stop support
* line endings
* Revert "line endings"
This reverts commit d0ddfe5ec7
.
* PI address debug
* readme test
* diagram update
* diagram background
* diagram background
* diagram background
* updated readme
229 lines
7.5 KiB
Python
Executable File
229 lines
7.5 KiB
Python
Executable File
#!/usr/bin/env python3
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import argparse
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import math
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import os
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import platform
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import sys
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from binascii import crc32
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from datetime import datetime
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from io import BufferedRandom
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class JedecError(Exception):
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pass
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class JedecFile:
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__fuse_length: int = 0
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__fuse_offset: int = 0
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__fuse_data: bytes = b''
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__byte_buffer: int = 0
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def __handle_q_field(self, f: BufferedRandom) -> None:
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type = f.read(1)
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if (type == b'F'):
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value = b''
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while (True):
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data = f.read(1)
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if (data == b'*'):
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value = value.decode('ascii', errors='backslashreplace')
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if (not value.isdecimal()):
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raise JedecError('Invalid Q field data')
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self.__fuse_length = int(value)
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break
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else:
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value += data
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else:
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self.__ignore_field(f)
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def __handle_l_field(self, f: BufferedRandom) -> None:
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if (self.__fuse_length <= 0):
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raise JedecError('Found fuse data before declaring fuse count')
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offset = b''
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while (True):
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data = f.read(1)
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if (data >= b'0' and data <= b'9'):
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offset += data
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elif (data == b'\r' or data == b'\n'):
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offset = offset.decode('ascii', errors='backslashreplace')
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if (not offset.isdecimal()):
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raise JedecError('Invalid L field offset data')
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offset = int(offset)
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if (offset != self.__fuse_offset):
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raise JedecError('Fuse data is not continuous')
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break
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else:
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raise JedecError('Unexpected byte inside L field offset data')
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data = b''
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while (True):
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data = f.read(1)
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if (data == b'0' or data == b'1'):
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shift = (7 - (self.__fuse_offset % 8))
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self.__byte_buffer |= (1 if data == b'1' else 0) << shift
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if (((self.__fuse_offset % 8) == 7) or (self.__fuse_offset == (self.__fuse_length - 1))):
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self.__fuse_data += int.to_bytes(self.__byte_buffer, 1, byteorder='little')
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self.__byte_buffer = 0
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self.__fuse_offset += 1
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elif (data == b'\r' or data == b'\n'):
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pass
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elif (data == b'*'):
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break
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elif (data == b''):
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raise JedecError('Unexpected end of file')
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else:
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raise JedecError('Unexpected byte inside L field fuse data')
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def __ignore_field(self, f: BufferedRandom) -> None:
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data = None
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while (data != b'*'):
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data = f.read(1)
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if (data == b''):
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raise JedecError('Unexpected end of file')
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def parse(self, path: str) -> bytes:
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self.__fuse_length = 0
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self.__fuse_offset = 0
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self.__fuse_data = b''
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self.__byte_buffer = 0
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field = None
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with open(path, 'rb+') as f:
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while (True):
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field = f.read(1)
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if (field == b'\x02'):
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f.seek(-1, os.SEEK_CUR)
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break
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elif (field == b''):
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raise JedecError('Unexpected end of file')
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while (True):
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field = f.read(1)
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if (field == b'Q'):
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self.__handle_q_field(f)
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elif (field == b'L'):
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self.__handle_l_field(f)
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elif (field == b'\r' or field == b'\n'):
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pass
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elif (field == b'\x03'):
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break
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elif (field == b''):
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raise JedecError('Unexpected end of file')
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else:
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self.__ignore_field(f)
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if (self.__fuse_length <= 0):
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raise JedecError('No fuse data found')
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if (self.__fuse_offset != self.__fuse_length):
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raise JedecError('Missing fuse data inside JEDEC file')
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if (len(self.__fuse_data) != math.ceil(self.__fuse_length / 8)):
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raise JedecError('Missing fuse data inside JEDEC file')
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return self.__fuse_data
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class SC64UpdateData:
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__UPDATE_TOKEN = b'SC64 Update v2.0'
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__CHUNK_ID_UPDATE_INFO = 1
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__CHUNK_ID_MCU_DATA = 2
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__CHUNK_ID_FPGA_DATA = 3
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__CHUNK_ID_BOOTLOADER_DATA = 4
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__data = b''
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def __int_to_bytes(self, value: int) -> bytes:
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return value.to_bytes(4, byteorder='little')
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def __align(self, value: int) -> int:
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if (value % 16 != 0):
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value += (16 - (value % 16))
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return value
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def __add_chunk(self, id: int, data: bytes) -> None:
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chunk = b''
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chunk_length = (16 + len(data))
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aligned_length = self.__align(chunk_length)
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chunk += self.__int_to_bytes(id)
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chunk += self.__int_to_bytes(aligned_length - 8)
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chunk += self.__int_to_bytes(crc32(data))
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chunk += self.__int_to_bytes(len(data))
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chunk += data
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chunk += bytes([0] * (aligned_length - chunk_length))
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self.__data += chunk
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def create_update_data(self) -> None:
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self.__data = self.__UPDATE_TOKEN
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def add_update_info(self, data: bytes) -> None:
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self.__add_chunk(self.__CHUNK_ID_UPDATE_INFO, data)
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def add_mcu_data(self, data: bytes) -> None:
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self.__add_chunk(self.__CHUNK_ID_MCU_DATA, data)
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def add_fpga_data(self, data: bytes) -> None:
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self.__add_chunk(self.__CHUNK_ID_FPGA_DATA, data)
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def add_bootloader_data(self, data: bytes) -> None:
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self.__add_chunk(self.__CHUNK_ID_BOOTLOADER_DATA, data)
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def get_update_data(self) -> bytes:
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return self.__data
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if __name__ == "__main__":
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parser = argparse.ArgumentParser(description='SC64 update file generator')
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parser.add_argument('--git', metavar='git', required=False, help='git text to embed in update info')
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parser.add_argument('--mcu', metavar='mcu_path', required=False, help='path to MCU update data')
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parser.add_argument('--fpga', metavar='fpga_path', required=False, help='path to FPGA update data')
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parser.add_argument('--boot', metavar='bootloader_path', required=False, help='path to N64 bootloader update data')
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parser.add_argument('output', metavar='output_path', help='path to final update data')
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if (len(sys.argv) <= 1):
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parser.print_help()
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parser.exit()
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args = parser.parse_args()
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try:
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update = SC64UpdateData()
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update.create_update_data()
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hostname = platform.node()
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creation_datetime = datetime.utcnow().strftime('%Y-%m-%d %H:%M:%S')
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info = [
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f'build system: [{hostname}]',
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f'creation datetime: [{creation_datetime}]',
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]
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if (args.git):
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info.append(args.git)
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update_info = ' '.join(info)
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print(update_info)
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update.add_update_info(update_info.encode())
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if (args.mcu):
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with open(args.mcu, 'rb+') as f:
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update.add_mcu_data(f.read())
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if (args.fpga):
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update.add_fpga_data(JedecFile().parse(args.fpga))
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if (args.boot):
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with open(args.boot, 'rb+') as f:
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update.add_bootloader_data(f.read())
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with open(args.output, 'wb+') as f:
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f.write(update.get_update_data())
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except JedecError as e:
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print(f'Error while parsing FPGA update data: {e}')
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exit(-1)
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except IOError as e:
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print(f'IOError: {e}')
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exit(-1)
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