mirror of
https://github.com/Polprzewodnikowy/SummerCart64.git
synced 2024-11-23 06:19:16 +01:00
5b85b0f661
* [SC64][SW] Added board bring-up via UART header * [SC64][SW] Made I2C in primer stable * [SC64][SW] LCMXO2 primer fixes * [SC64][SW] SC64 primer PC software * [SC64][SW] Added primer.py to release package * [SC64][SW] Fixed FPGA refresh * [SC64][SW] Changed release package contents
255 lines
8.5 KiB
Python
Executable File
255 lines
8.5 KiB
Python
Executable File
#!/usr/bin/env python3
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import argparse
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import math
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import os
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import platform
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import sys
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from binascii import crc32
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from datetime import datetime
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from io import BufferedRandom
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class JedecError(Exception):
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pass
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class JedecFile:
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__fuse_length: int = 0
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__fuse_offset: int = 0
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__fuse_data: bytes = b''
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__fuse_ignore: bool = False
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__byte_buffer: int = 0
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def __handle_q_field(self, f: BufferedRandom) -> None:
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type = f.read(1)
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if (type == b'F'):
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value = b''
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while (True):
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data = f.read(1)
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if (data == b'*'):
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value = value.decode('ascii', errors='backslashreplace')
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if (not value.isdecimal()):
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raise JedecError('Invalid Q field data')
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self.__fuse_length = int(value)
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break
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else:
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value += data
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else:
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self.__ignore_field(f)
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def __handle_l_field(self, f: BufferedRandom) -> None:
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if (self.__fuse_length <= 0):
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raise JedecError('Found fuse data before declaring fuse count')
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offset = b''
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while (True):
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data = f.read(1)
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if (data >= b'0' and data <= b'9'):
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offset += data
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elif (data == b'\r' or data == b'\n'):
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offset = offset.decode('ascii', errors='backslashreplace')
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if (not offset.isdecimal()):
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raise JedecError('Invalid L field offset data')
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offset = int(offset)
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if (offset != self.__fuse_offset):
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raise JedecError('Fuse data is not continuous')
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break
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else:
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raise JedecError('Unexpected byte inside L field offset data')
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data = b''
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while (True):
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data = f.read(1)
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if (data == b'0' or data == b'1'):
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shift = (7 - (self.__fuse_offset % 8))
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self.__byte_buffer |= (1 if data == b'1' else 0) << shift
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if (((self.__fuse_offset % 8) == 7) or (self.__fuse_offset == (self.__fuse_length - 1))):
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self.__fuse_data += int.to_bytes(self.__byte_buffer, 1, byteorder='little')
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self.__byte_buffer = 0
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self.__fuse_offset += 1
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elif (data == b'\r' or data == b'\n'):
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pass
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elif (data == b'*'):
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break
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elif (data == b''):
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raise JedecError('Unexpected end of file')
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else:
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raise JedecError('Unexpected byte inside L field fuse data')
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def __handle_n_field(self, f: BufferedRandom) -> None:
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data = b''
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buffer = b''
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while (buffer != b'*'):
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buffer = f.read(1)
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if (buffer == b''):
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raise JedecError('Unexpected end of file')
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if (buffer != b'*'):
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data += buffer
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if (data == b'OTE END CONFIG DATA'):
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self.__fuse_length = self.__fuse_offset
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self.__fuse_ignore = True
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def __ignore_field(self, f: BufferedRandom) -> None:
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data = None
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while (data != b'*'):
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data = f.read(1)
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if (data == b''):
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raise JedecError('Unexpected end of file')
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def parse(self, path: str) -> bytes:
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self.__fuse_length = 0
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self.__fuse_offset = 0
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self.__fuse_data = b''
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self.__fuse_ignore = False
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self.__byte_buffer = 0
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field = None
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with open(path, 'rb+') as f:
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while (True):
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field = f.read(1)
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if (field == b'\x02'):
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f.seek(-1, os.SEEK_CUR)
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break
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elif (field == b''):
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raise JedecError('Unexpected end of file')
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while (True):
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field = f.read(1)
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if (field == b'Q'):
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self.__handle_q_field(f)
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elif (field == b'L' and not self.__fuse_ignore):
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self.__handle_l_field(f)
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elif (field == b'N'):
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self.__handle_n_field(f)
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elif (field == b'\r' or field == b'\n'):
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pass
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elif (field == b'\x03'):
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break
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elif (field == b''):
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raise JedecError('Unexpected end of file')
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else:
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self.__ignore_field(f)
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if (self.__fuse_length <= 0):
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raise JedecError('No fuse data found')
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if (self.__fuse_offset != self.__fuse_length):
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raise JedecError('Missing fuse data inside JEDEC file')
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if (len(self.__fuse_data) != math.ceil(self.__fuse_length / 8)):
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raise JedecError('Missing fuse data inside JEDEC file')
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return self.__fuse_data
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class SC64UpdateData:
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__UPDATE_TOKEN = b'SC64 Update v2.0'
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__CHUNK_ID_UPDATE_INFO = 1
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__CHUNK_ID_MCU_DATA = 2
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__CHUNK_ID_FPGA_DATA = 3
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__CHUNK_ID_BOOTLOADER_DATA = 4
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__CHUNK_ID_PRIMER_DATA = 5
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__data = b''
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def __int_to_bytes(self, value: int) -> bytes:
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return value.to_bytes(4, byteorder='little')
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def __align(self, value: int) -> int:
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if (value % 16 != 0):
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value += (16 - (value % 16))
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return value
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def __add_chunk(self, id: int, data: bytes) -> None:
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chunk = b''
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chunk_length = (16 + len(data))
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aligned_length = self.__align(chunk_length)
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chunk += self.__int_to_bytes(id)
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chunk += self.__int_to_bytes(aligned_length - 8)
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chunk += self.__int_to_bytes(crc32(data))
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chunk += self.__int_to_bytes(len(data))
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chunk += data
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chunk += bytes([0] * (aligned_length - chunk_length))
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self.__data += chunk
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def create_update_data(self) -> None:
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self.__data = self.__UPDATE_TOKEN
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def add_update_info(self, data: bytes) -> None:
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self.__add_chunk(self.__CHUNK_ID_UPDATE_INFO, data)
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def add_mcu_data(self, data: bytes) -> None:
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self.__add_chunk(self.__CHUNK_ID_MCU_DATA, data)
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def add_fpga_data(self, data: bytes) -> None:
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self.__add_chunk(self.__CHUNK_ID_FPGA_DATA, data)
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def add_bootloader_data(self, data: bytes) -> None:
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self.__add_chunk(self.__CHUNK_ID_BOOTLOADER_DATA, data)
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def add_primer_data(self, data: bytes) -> None:
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self.__add_chunk(self.__CHUNK_ID_PRIMER_DATA, data)
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def get_update_data(self) -> bytes:
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return self.__data
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if __name__ == "__main__":
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parser = argparse.ArgumentParser(description='SC64 update file generator')
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parser.add_argument('--git', metavar='git', required=False, help='git text to embed in update info')
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parser.add_argument('--mcu', metavar='mcu_path', required=False, help='path to MCU update data')
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parser.add_argument('--fpga', metavar='fpga_path', required=False, help='path to FPGA update data')
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parser.add_argument('--boot', metavar='bootloader_path', required=False, help='path to N64 bootloader update data')
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parser.add_argument('--primer', metavar='primer_path', required=False, help='path to MCU board bring-up data')
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parser.add_argument('output', metavar='output_path', help='path to final update data')
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if (len(sys.argv) <= 1):
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parser.print_help()
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parser.exit()
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args = parser.parse_args()
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try:
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update = SC64UpdateData()
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update.create_update_data()
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hostname = platform.node()
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creation_datetime = datetime.utcnow().strftime('%Y-%m-%d %H:%M:%S')
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info = [
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f'build system: [{hostname}]',
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f'creation datetime: [{creation_datetime}]',
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]
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if (args.git):
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info.append(args.git)
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update_info = ' '.join(info)
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print(update_info)
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update.add_update_info(update_info.encode())
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if (args.mcu):
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with open(args.mcu, 'rb+') as f:
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update.add_mcu_data(f.read())
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if (args.fpga):
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update.add_fpga_data(JedecFile().parse(args.fpga))
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if (args.boot):
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with open(args.boot, 'rb+') as f:
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update.add_bootloader_data(f.read())
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if (args.primer):
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with open(args.primer, 'rb+') as f:
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update.add_primer_data(f.read())
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with open(args.output, 'wb+') as f:
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f.write(update.get_update_data())
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except JedecError as e:
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print(f'Error while parsing FPGA update data: {e}')
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exit(-1)
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except IOError as e:
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print(f'IOError: {e}')
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exit(-1)
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