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SummerCart64/fw/project/lcmxo2/sc64.lpf
Mateusz Faderewski 9599db8307 [SC64][FW] Set timing constraints for SDRAM pins
2024-05-05 07:08:44 +02:00

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RVL_ALIAS "clk" "clk";
BANK 0 VCCIO 3.3 V;
BANK 1 VCCIO 3.3 V;
BANK 2 VCCIO 3.3 V;
BANK 3 VCCIO 3.3 V;
BANK 4 VCCIO 3.3 V;
BANK 5 VCCIO 3.3 V;
BLOCK ASYNCPATHS ;
BLOCK JTAGPATHS ;
BLOCK PATH FROM PORT "button" ;
BLOCK RESETPATHS ;
IOBUF ALLPORTS IO_TYPE=LVCMOS33 ;
IOBUF PORT "button" PULLMODE=UP IO_TYPE=LVCMOS33 ;
IOBUF PORT "flash_clk" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "flash_cs" PULLMODE=UP IO_TYPE=LVCMOS33 ;
IOBUF PORT "flash_dq[0]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "flash_dq[1]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "flash_dq[2]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "flash_dq[3]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "inclk" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "mcu_clk" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "mcu_cs" PULLMODE=UP IO_TYPE=LVCMOS33 ;
IOBUF PORT "mcu_int" PULLMODE=UP IO_TYPE=LVCMOS33 ;
IOBUF PORT "mcu_miso" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "mcu_mosi" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "n64_cic_clk" PULLMODE=UP IO_TYPE=LVCMOS33 ;
IOBUF PORT "n64_cic_dq" PULLMODE=UP IO_TYPE=LVCMOS33 ;
IOBUF PORT "n64_irq" PULLMODE=UP IO_TYPE=LVCMOS33 ;
IOBUF PORT "n64_nmi" PULLMODE=DOWN IO_TYPE=LVCMOS33 ;
IOBUF PORT "n64_pi_ad[0]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "n64_pi_ad[1]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "n64_pi_ad[10]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "n64_pi_ad[11]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "n64_pi_ad[12]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "n64_pi_ad[13]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "n64_pi_ad[14]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "n64_pi_ad[15]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "n64_pi_ad[2]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "n64_pi_ad[3]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "n64_pi_ad[4]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "n64_pi_ad[5]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "n64_pi_ad[6]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "n64_pi_ad[7]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "n64_pi_ad[8]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "n64_pi_ad[9]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "n64_pi_aleh" PULLMODE=UP IO_TYPE=LVCMOS33 ;
IOBUF PORT "n64_pi_alel" PULLMODE=DOWN IO_TYPE=LVCMOS33 ;
IOBUF PORT "n64_pi_read" PULLMODE=UP IO_TYPE=LVCMOS33 ;
IOBUF PORT "n64_pi_write" PULLMODE=UP IO_TYPE=LVCMOS33 ;
IOBUF PORT "n64_reset" PULLMODE=DOWN IO_TYPE=LVCMOS33 ;
IOBUF PORT "n64_si_clk" PULLMODE=DOWN IO_TYPE=LVCMOS33 ;
IOBUF PORT "n64_si_dq" PULLMODE=UP IO_TYPE=LVCMOS33 ;
IOBUF PORT "n64_video_sync" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "sd_clk" PULLMODE=UP IO_TYPE=LVCMOS33 ;
IOBUF PORT "sd_cmd" PULLMODE=UP IO_TYPE=LVCMOS33 ;
IOBUF PORT "sd_dat[0]" PULLMODE=UP IO_TYPE=LVCMOS33 ;
IOBUF PORT "sd_dat[1]" PULLMODE=UP IO_TYPE=LVCMOS33 ;
IOBUF PORT "sd_dat[2]" PULLMODE=UP IO_TYPE=LVCMOS33 ;
IOBUF PORT "sd_dat[3]" PULLMODE=UP IO_TYPE=LVCMOS33 ;
IOBUF PORT "sd_det" PULLMODE=UP IO_TYPE=LVCMOS33 ;
IOBUF PORT "sdram_a[0]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "sdram_a[1]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "sdram_a[10]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "sdram_a[11]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "sdram_a[12]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "sdram_a[2]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "sdram_a[3]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "sdram_a[4]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "sdram_a[5]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "sdram_a[6]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "sdram_a[7]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "sdram_a[8]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "sdram_a[9]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "sdram_ba[0]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "sdram_ba[1]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "sdram_cas" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "sdram_clk" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "sdram_cs" PULLMODE=UP IO_TYPE=LVCMOS33 ;
IOBUF PORT "sdram_dq[0]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "sdram_dq[1]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "sdram_dq[10]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "sdram_dq[11]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "sdram_dq[12]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "sdram_dq[13]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "sdram_dq[14]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "sdram_dq[15]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "sdram_dq[2]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "sdram_dq[3]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "sdram_dq[4]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "sdram_dq[5]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "sdram_dq[6]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "sdram_dq[7]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "sdram_dq[8]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "sdram_dq[9]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "sdram_dqm[0]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "sdram_dqm[1]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "sdram_ras" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "sdram_we" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "test_point[0]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "test_point[1]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "test_point[2]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "usb_clk" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "usb_cs" PULLMODE=UP IO_TYPE=LVCMOS33 ;
IOBUF PORT "usb_miosi[0]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "usb_miosi[1]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "usb_miosi[2]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "usb_miosi[3]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "usb_miosi[4]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "usb_miosi[5]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "usb_miosi[6]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "usb_miosi[7]" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "usb_miso" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "usb_pwrsav" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
LOCATE COMP "button" SITE "1" ;
LOCATE COMP "flash_clk" SITE "142" ;
LOCATE COMP "flash_cs" SITE "138" ;
LOCATE COMP "flash_dq[0]" SITE "141" ;
LOCATE COMP "flash_dq[1]" SITE "139" ;
LOCATE COMP "flash_dq[2]" SITE "140" ;
LOCATE COMP "flash_dq[3]" SITE "143" ;
LOCATE COMP "inclk" SITE "3" ;
LOCATE COMP "mcu_clk" SITE "121" ;
LOCATE COMP "mcu_cs" SITE "122" ;
LOCATE COMP "mcu_int" SITE "117" ;
LOCATE COMP "mcu_miso" SITE "119" ;
LOCATE COMP "mcu_mosi" SITE "120" ;
LOCATE COMP "n64_irq" SITE "32" ;
LOCATE COMP "n64_nmi" SITE "28" ;
LOCATE COMP "n64_cic_clk" SITE "34" ;
LOCATE COMP "n64_cic_dq" SITE "35" ;
LOCATE COMP "n64_pi_ad[0]" SITE "60" ;
LOCATE COMP "n64_pi_ad[1]" SITE "58" ;
LOCATE COMP "n64_pi_ad[10]" SITE "42" ;
LOCATE COMP "n64_pi_ad[11]" SITE "44" ;
LOCATE COMP "n64_pi_ad[12]" SITE "52" ;
LOCATE COMP "n64_pi_ad[13]" SITE "55" ;
LOCATE COMP "n64_pi_ad[14]" SITE "57" ;
LOCATE COMP "n64_pi_ad[15]" SITE "59" ;
LOCATE COMP "n64_pi_ad[2]" SITE "56" ;
LOCATE COMP "n64_pi_ad[3]" SITE "54" ;
LOCATE COMP "n64_pi_ad[4]" SITE "45" ;
LOCATE COMP "n64_pi_ad[5]" SITE "43" ;
LOCATE COMP "n64_pi_ad[6]" SITE "40" ;
LOCATE COMP "n64_pi_ad[7]" SITE "38" ;
LOCATE COMP "n64_pi_ad[8]" SITE "39" ;
LOCATE COMP "n64_pi_ad[9]" SITE "41" ;
LOCATE COMP "n64_pi_aleh" SITE "48" ;
LOCATE COMP "n64_pi_alel" SITE "50" ;
LOCATE COMP "n64_pi_read" SITE "47" ;
LOCATE COMP "n64_pi_write" SITE "49" ;
LOCATE COMP "n64_reset" SITE "31" ;
LOCATE COMP "n64_si_clk" SITE "33" ;
LOCATE COMP "n64_si_dq" SITE "27" ;
LOCATE COMP "n64_video_sync" SITE "26" ;
LOCATE COMP "sd_clk" SITE "111" ;
LOCATE COMP "sd_cmd" SITE "112" ;
LOCATE COMP "sd_dat[0]" SITE "110" ;
LOCATE COMP "sd_dat[1]" SITE "109" ;
LOCATE COMP "sd_dat[2]" SITE "114" ;
LOCATE COMP "sd_dat[3]" SITE "113" ;
LOCATE COMP "sd_det" SITE "115" ;
LOCATE COMP "sdram_a[0]" SITE "85" ;
LOCATE COMP "sdram_a[1]" SITE "86" ;
LOCATE COMP "sdram_a[10]" SITE "84" ;
LOCATE COMP "sdram_a[11]" SITE "63" ;
LOCATE COMP "sdram_a[12]" SITE "62" ;
LOCATE COMP "sdram_a[2]" SITE "87" ;
LOCATE COMP "sdram_a[3]" SITE "89" ;
LOCATE COMP "sdram_a[4]" SITE "71" ;
LOCATE COMP "sdram_a[5]" SITE "70" ;
LOCATE COMP "sdram_a[6]" SITE "69" ;
LOCATE COMP "sdram_a[7]" SITE "68" ;
LOCATE COMP "sdram_a[8]" SITE "67" ;
LOCATE COMP "sdram_a[9]" SITE "65" ;
LOCATE COMP "sdram_ba[0]" SITE "92" ;
LOCATE COMP "sdram_ba[1]" SITE "91" ;
LOCATE COMP "sdram_cas" SITE "95" ;
LOCATE COMP "sdram_clk" SITE "61" ;
LOCATE COMP "sdram_cs" SITE "93" ;
LOCATE COMP "sdram_dq[0]" SITE "107" ;
LOCATE COMP "sdram_dq[1]" SITE "106" ;
LOCATE COMP "sdram_dq[10]" SITE "76" ;
LOCATE COMP "sdram_dq[11]" SITE "77" ;
LOCATE COMP "sdram_dq[12]" SITE "78" ;
LOCATE COMP "sdram_dq[13]" SITE "81" ;
LOCATE COMP "sdram_dq[14]" SITE "82" ;
LOCATE COMP "sdram_dq[15]" SITE "83" ;
LOCATE COMP "sdram_dq[2]" SITE "105" ;
LOCATE COMP "sdram_dq[3]" SITE "104" ;
LOCATE COMP "sdram_dq[4]" SITE "103" ;
LOCATE COMP "sdram_dq[5]" SITE "100" ;
LOCATE COMP "sdram_dq[6]" SITE "99" ;
LOCATE COMP "sdram_dq[7]" SITE "98" ;
LOCATE COMP "sdram_dq[8]" SITE "74" ;
LOCATE COMP "sdram_dq[9]" SITE "75" ;
LOCATE COMP "sdram_dqm[0]" SITE "97" ;
LOCATE COMP "sdram_dqm[1]" SITE "73" ;
LOCATE COMP "sdram_ras" SITE "94" ;
LOCATE COMP "sdram_we" SITE "96" ;
LOCATE COMP "test_point[0]" SITE "23" ;
LOCATE COMP "test_point[1]" SITE "24" ;
LOCATE COMP "test_point[2]" SITE "25" ;
LOCATE COMP "usb_clk" SITE "12" ;
LOCATE COMP "usb_cs" SITE "11" ;
LOCATE COMP "usb_miosi[0]" SITE "22" ;
LOCATE COMP "usb_miosi[1]" SITE "21" ;
LOCATE COMP "usb_miosi[2]" SITE "20" ;
LOCATE COMP "usb_miosi[3]" SITE "19" ;
LOCATE COMP "usb_miosi[4]" SITE "17" ;
LOCATE COMP "usb_miosi[5]" SITE "15" ;
LOCATE COMP "usb_miosi[6]" SITE "14" ;
LOCATE COMP "usb_miosi[7]" SITE "13" ;
LOCATE COMP "usb_miso" SITE "10" ;
LOCATE COMP "usb_pwrsav" SITE "2" ;
SYSCONFIG SDM_PORT=DISABLE I2C_PORT=ENABLE ;
VOLTAGE 3.300 V;
FREQUENCY NET "clk" 100.000000 MHz PAR_ADJ 10.000000 ;
BLOCK PATH TO PORT "mcu_int" ;
BLOCK PATH TO PORT "n64_irq" ;
BLOCK PATH FROM PORT "usb_pwrsav" ;
BLOCK PATH FROM PORT "sd_det" ;
DEFINE PORT GROUP "sdram_output" "sdram_cs"
"sdram_ras"
"sdram_cas"
"sdram_we"
"sdram_ba[1]"
"sdram_ba[0]"
"sdram_a[12]"
"sdram_a[11]"
"sdram_a[10]"
"sdram_a[9]"
"sdram_a[8]"
"sdram_a[7]"
"sdram_a[6]"
"sdram_a[5]"
"sdram_a[4]"
"sdram_a[3]"
"sdram_a[2]"
"sdram_a[1]"
"sdram_a[0]"
"sdram_dqm[1]"
"sdram_dqm[0]" ;
DEFINE PORT GROUP "sdram_bidir" "sdram_dq[15]"
"sdram_dq[14]"
"sdram_dq[13]"
"sdram_dq[12]"
"sdram_dq[11]"
"sdram_dq[10]"
"sdram_dq[9]"
"sdram_dq[8]"
"sdram_dq[7]"
"sdram_dq[6]"
"sdram_dq[5]"
"sdram_dq[4]"
"sdram_dq[3]"
"sdram_dq[2]"
"sdram_dq[1]"
"sdram_dq[0]" ;
INPUT_SETUP GROUP "sdram_bidir"INPUT_DELAY 5.400000 ns HOLD -2.500000 ns CLKNET "clk" CLK_OFFSET -0.250000 X ;
CLOCK_TO_OUT GROUP "sdram_output" OUTPUT_DELAY 1.500000 ns MIN 0.800000 ns CLKNET "clk" CLKOUT PORT "sdram_clk" ;
CLOCK_TO_OUT GROUP "sdram_bidir" OUTPUT_DELAY 1.500000 ns MIN 0.800000 ns CLKNET "clk" CLKOUT PORT "sdram_clk" ;
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