mirror of
https://github.com/Polprzewodnikowy/SummerCart64.git
synced 2024-11-22 14:09:16 +01:00
421d0438f3
This PR completely removes `task.c / task.h` from `sw/controller` STM32 code. Additionally, these changes were implemented: - Updated IPL3 - Added new diagnostic data (voltage and temperature) readout commands for USB and N64 - Fixed some issues with FlashRAM save type - Joybus timings were relaxed to accommodate communication with unsynchronized master controller (like _Datel Game Killer_, thanks @RWeick) - N64 embedded test program now waits for release of button press to proceed - Fixed issue where, in rare circumstances, I2C peripheral in STM32 would get locked-up on power-up - LED blinking behavior on SD card access was changed - LED blink duration on save writeback has been extended - Minor fixes through the entire of hardware abstraction layer for STM32 code - Primer now correctly detects issues with I2C bus during first time programming - `primer.py` script gives more meaningful error messages - Fixed bug where RTC time was always written on N64FlashcartMenu boot - sc64deployer now displays "Diagnostic data" instead of "MCU stack usage"
91 lines
1.9 KiB
C
91 lines
1.9 KiB
C
#include "cic.h"
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#include "fpga.h"
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#include "hw.h"
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#include "led.h"
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#include "rtc.h"
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typedef enum {
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REGION_NTSC,
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REGION_PAL,
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__REGION_MAX
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} cic_region_t;
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static bool cic_error_active = false;
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void cic_reset_parameters (void) {
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cic_region_t region = rtc_get_region();
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const uint8_t default_seed = 0x3F;
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const uint64_t default_checksum = 0xA536C0F1D859ULL;
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uint32_t cfg[2] = {
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(default_seed << CIC_SEED_BIT) | ((default_checksum >> 32) & 0xFFFF),
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(default_checksum & 0xFFFFFFFFUL)
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};
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if (region == REGION_PAL) {
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cfg[0] |= CIC_REGION;
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}
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fpga_reg_set(REG_CIC_0, cfg[0]);
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fpga_reg_set(REG_CIC_1, cfg[1]);
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}
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void cic_set_parameters (uint32_t *args) {
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uint32_t cfg[2] = {
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args[0] & (0x00FFFFFF),
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args[1]
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};
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cfg[0] |= fpga_reg_get(REG_CIC_0) & (CIC_64DD_MODE | CIC_REGION);
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if (args[0] & (1 << 24)) {
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cfg[0] |= CIC_DISABLED;
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}
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fpga_reg_set(REG_CIC_0, cfg[0]);
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fpga_reg_set(REG_CIC_1, cfg[1]);
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}
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void cic_set_dd_mode (bool enabled) {
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uint32_t cfg = fpga_reg_get(REG_CIC_0);
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if (enabled) {
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cfg |= CIC_64DD_MODE;
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} else {
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cfg &= ~(CIC_64DD_MODE);
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}
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fpga_reg_set(REG_CIC_0, cfg);
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}
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void cic_init (void) {
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cic_reset_parameters();
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}
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void cic_process (void) {
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uint32_t cfg = fpga_reg_get(REG_CIC_0);
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if (cfg & CIC_INVALID_REGION_DETECTED) {
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cfg ^= CIC_REGION;
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cfg |= CIC_INVALID_REGION_RESET;
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fpga_reg_set(REG_CIC_0, cfg);
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cic_region_t region = (cfg & CIC_REGION) ? REGION_PAL : REGION_NTSC;
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rtc_set_region(region);
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cic_error_active = true;
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led_blink_error(LED_ERROR_CIC);
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}
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if (cic_error_active && (!hw_gpio_get(GPIO_ID_N64_RESET))) {
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cic_error_active = false;
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led_clear_error(LED_ERROR_CIC);
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}
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}
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