mirror of
https://github.com/Polprzewodnikowy/SummerCart64.git
synced 2025-02-18 13:06:19 +01:00
ff69030643
* isv support + usb/dd improvements * make room for saves * update offset * fixed debug address * idk * exception * ironed out all broken stuff * cleanup * return epc fix * better * more cleanup * even more cleanup * mooore cleanup * fixed printf * no assert * improved docker build, pyft232 instead of pyserial * fixed displaying long message strings description test * just straight cleanup * smallest cleanup * PAL * cpu buffer * n64 bootloader done * super slow usb storage reading implemented * reduced buffer size * usb gets fast * little cleanup * double buffered reads * removed separate event id * ISV in hardware finally * small exception changes * mac testing * py spacing * fsd write, rtc, isv and reset fixes * fixxx * good stopping point * usb fixed? * pretend we have 128 MB sdram * backup * chmod * test * test done * more tests * user rm * help * final fix * updated component values * nice asset names * cic 64dd support * ddipl enable separation * pre DMA rewrite, created dedicated buffer memory space, simplified code * dma rewrite, needs testing * moved xml * dd basics * timing * 64dd working yet again, isv brought back, dma fixes, usb path rewrite, pc code rewrite * added usb read functionality, general cleanup * changed mem addressing * added fpga flash update access * added mcu update * chmod * little cleanup * update format and stuff * fixes * uninitialized fix * small fixes * update fixes * update stuff done * fpga update tested * build time fix * boot fix * test timing * readme test * test 2 * reports * testseet * final * build test * forgot * button and naming * General cleanup And multiline commit message test * Exception screen UI touch ups * display separation and tests beginning * pc software update * pc software done * timing test * delete launch.json * sw fixes * fixed button hole diameter in shell * small cleanup, rpi testing * shell fillet fix, pc rtc printing * added cfg lock mechanism * moved lock to cfg address space * extended ROM and ISV fixes * preliminary sd card support * little sd card cleanup * sd menu fixes * 5 second limit * reduced shell thickness * basic led act blinking * faster sd menu loading * inst cache invalidate * sd card writing is working * SD card CSD and CID registers * wait for previous command * led error codes * fixed cfg_translate_address use * 64dd from sd card working * 64dd speedup and button handling * delayed address latching cycle - might break other builds, needs testing * bootloader improvements * small fixes * return previous cfg when setting new * cache stuff * unfloader debug protocol support * UNFLoader style debug command line support * requirements.txt * shell groove fillet * reset state inside controller * fixed fast PI read, added PI R/W fifo debug info * PI access prioritize * SD clock stop when RX FIFO is more than half full * flash erase method change * CFG error handling, TLOZ MM debug ISV support * CIC5167 support * general fixes * USB unplugged cable handling * turn off led when changing between error/act modes * rtc 2 bit clock stop support * line endings * Revert "line endings" This reverts commit d0ddfe5ec716d2db7c72561703f51a94bf34e6bb. * PI address debug * readme test * diagram update * diagram background * diagram background * diagram background * updated readme
250 lines
8.1 KiB
C
Vendored
250 lines
8.1 KiB
C
Vendored
/**
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******************************************************************************
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* @file stm32g0xx.h
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* @author MCD Application Team
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* @brief CMSIS STM32G0xx Device Peripheral Access Layer Header File.
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*
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* The file is the unique include file that the application programmer
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* is using in the C source code, usually in main.c. This file contains:
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* - Configuration section that allows to select:
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* - The STM32G0xx device used in the target application
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* - To use or not the peripherals drivers in application code(i.e.
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* code will be based on direct access to peripherals registers
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* rather than drivers API), this option is controlled by
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* "#define USE_HAL_DRIVER"
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*
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2018-2021 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/** @addtogroup CMSIS
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* @{
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*/
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/** @addtogroup stm32g0xx
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* @{
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*/
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#ifndef STM32G0xx_H
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#define STM32G0xx_H
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#ifdef __cplusplus
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extern "C" {
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#endif /* __cplusplus */
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/** @addtogroup Library_configuration_section
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* @{
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*/
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/**
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* @brief STM32 Family
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*/
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#if !defined (STM32G0)
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#define STM32G0
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#endif /* STM32G0 */
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/* Uncomment the line below according to the target STM32G0 device used in your
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application
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*/
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#if !defined (STM32G071xx) && !defined (STM32G081xx) && !defined (STM32G070xx) \
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&& !defined (STM32G030xx) && !defined (STM32G031xx) && !defined (STM32G041xx) \
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&& !defined (STM32G0B0xx) && !defined (STM32G0B1xx) && !defined (STM32G0C1xx) \
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&& !defined (STM32G050xx) && !defined (STM32G051xx) && !defined (STM32G061xx)
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/* #define STM32G0B0xx */ /*!< STM32G0B0xx Devices */
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/* #define STM32G0B1xx */ /*!< STM32G0B1xx Devices */
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/* #define STM32G0C1xx */ /*!< STM32G0C1xx Devices */
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/* #define STM32G070xx */ /*!< STM32G070xx Devices */
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/* #define STM32G071xx */ /*!< STM32G071xx Devices */
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/* #define STM32G081xx */ /*!< STM32G081xx Devices */
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/* #define STM32G050xx */ /*!< STM32G050xx Devices */
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/* #define STM32G051xx */ /*!< STM32G051xx Devices */
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/* #define STM32G061xx */ /*!< STM32G061xx Devices */
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/* #define STM32G030xx */ /*!< STM32G030xx Devices */
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/* #define STM32G031xx */ /*!< STM32G031xx Devices */
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/* #define STM32G041xx */ /*!< STM32G041xx Devices */
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#endif
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/* Tip: To avoid modifying this file each time you need to switch between these
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devices, you can define the device in your toolchain compiler preprocessor.
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*/
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#if !defined (USE_HAL_DRIVER)
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/**
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* @brief Comment the line below if you will not use the peripherals drivers.
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In this case, these drivers will not be included and the application code will
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be based on direct access to peripherals registers
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*/
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/*#define USE_HAL_DRIVER */
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#endif /* USE_HAL_DRIVER */
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/**
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* @brief CMSIS Device version number $VERSION$
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*/
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#define __STM32G0_CMSIS_VERSION_MAIN (0x01U) /*!< [31:24] main version */
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#define __STM32G0_CMSIS_VERSION_SUB1 (0x04U) /*!< [23:16] sub1 version */
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#define __STM32G0_CMSIS_VERSION_SUB2 (0x01U) /*!< [15:8] sub2 version */
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#define __STM32G0_CMSIS_VERSION_RC (0x00U) /*!< [7:0] release candidate */
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#define __STM32G0_CMSIS_VERSION ((__STM32G0_CMSIS_VERSION_MAIN << 24)\
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|(__STM32G0_CMSIS_VERSION_SUB1 << 16)\
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|(__STM32G0_CMSIS_VERSION_SUB2 << 8 )\
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|(__STM32G0_CMSIS_VERSION_RC))
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/**
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* @}
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*/
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/** @addtogroup Device_Included
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* @{
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*/
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#if defined(STM32G0B1xx)
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#include "stm32g0b1xx.h"
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#elif defined(STM32G0C1xx)
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#include "stm32g0c1xx.h"
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#elif defined(STM32G0B0xx)
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#include "stm32g0b0xx.h"
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#elif defined(STM32G071xx)
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#include "stm32g071xx.h"
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#elif defined(STM32G081xx)
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#include "stm32g081xx.h"
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#elif defined(STM32G070xx)
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#include "stm32g070xx.h"
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#elif defined(STM32G031xx)
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#include "stm32g031xx.h"
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#elif defined(STM32G041xx)
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#include "stm32g041xx.h"
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#elif defined(STM32G030xx)
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#include "stm32g030xx.h"
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#elif defined(STM32G051xx)
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#include "stm32g051xx.h"
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#elif defined(STM32G061xx)
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#include "stm32g061xx.h"
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#elif defined(STM32G050xx)
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#include "stm32g050xx.h"
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#else
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#error "Please select first the target STM32G0xx device used in your application (in stm32g0xx.h file)"
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#endif
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/**
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* @}
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*/
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/** @addtogroup Exported_types
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* @{
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*/
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typedef enum
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{
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RESET = 0,
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SET = !RESET
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} FlagStatus, ITStatus;
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typedef enum
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{
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DISABLE = 0,
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ENABLE = !DISABLE
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} FunctionalState;
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#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
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typedef enum
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{
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SUCCESS = 0,
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ERROR = !SUCCESS
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} ErrorStatus;
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/**
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* @}
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*/
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/** @addtogroup Exported_macros
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* @{
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*/
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#define SET_BIT(REG, BIT) ((REG) |= (BIT))
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#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))
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#define READ_BIT(REG, BIT) ((REG) & (BIT))
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#define CLEAR_REG(REG) ((REG) = (0x0))
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#define WRITE_REG(REG, VAL) ((REG) = (VAL))
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#define READ_REG(REG) ((REG))
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#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
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/* Use of interrupt control for register exclusive access */
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/* Atomic 32-bit register access macro to set one or several bits */
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#define ATOMIC_SET_BIT(REG, BIT) \
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do { \
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uint32_t primask; \
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primask = __get_PRIMASK(); \
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__set_PRIMASK(1); \
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SET_BIT((REG), (BIT)); \
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__set_PRIMASK(primask); \
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} while(0)
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/* Atomic 32-bit register access macro to clear one or several bits */
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#define ATOMIC_CLEAR_BIT(REG, BIT) \
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do { \
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uint32_t primask; \
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primask = __get_PRIMASK(); \
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__set_PRIMASK(1); \
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CLEAR_BIT((REG), (BIT)); \
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__set_PRIMASK(primask); \
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} while(0)
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/* Atomic 32-bit register access macro to clear and set one or several bits */
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#define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \
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do { \
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uint32_t primask; \
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primask = __get_PRIMASK(); \
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__set_PRIMASK(1); \
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MODIFY_REG((REG), (CLEARMSK), (SETMASK)); \
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__set_PRIMASK(primask); \
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} while(0)
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/* Atomic 16-bit register access macro to set one or several bits */
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#define ATOMIC_SETH_BIT(REG, BIT) ATOMIC_SET_BIT(REG, BIT) \
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/* Atomic 16-bit register access macro to clear one or several bits */
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#define ATOMIC_CLEARH_BIT(REG, BIT) ATOMIC_CLEAR_BIT(REG, BIT) \
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/* Atomic 16-bit register access macro to clear and set one or several bits */
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#define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK) ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \
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/*#define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL)))*/
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/**
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* @}
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*/
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#if defined (USE_HAL_DRIVER)
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#include "stm32g0xx_hal.h"
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#endif /* USE_HAL_DRIVER */
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#ifdef __cplusplus
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}
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#endif /* __cplusplus */
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#endif /* STM32G0xx_H */
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/**
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* @}
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*/
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/**
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* @}
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*/
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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