mirror of
https://github.com/Polprzewodnikowy/SummerCart64.git
synced 2025-02-16 20:29:12 +01:00
![Mateusz Faderewski](/assets/img/avatar_default.png)
* isv support + usb/dd improvements * make room for saves * update offset * fixed debug address * idk * exception * ironed out all broken stuff * cleanup * return epc fix * better * more cleanup * even more cleanup * mooore cleanup * fixed printf * no assert * improved docker build, pyft232 instead of pyserial * fixed displaying long message strings description test * just straight cleanup * smallest cleanup * PAL * cpu buffer * n64 bootloader done * super slow usb storage reading implemented * reduced buffer size * usb gets fast * little cleanup * double buffered reads * removed separate event id * ISV in hardware finally * small exception changes * mac testing * py spacing * fsd write, rtc, isv and reset fixes * fixxx * good stopping point * usb fixed? * pretend we have 128 MB sdram * backup * chmod * test * test done * more tests * user rm * help * final fix * updated component values * nice asset names * cic 64dd support * ddipl enable separation * pre DMA rewrite, created dedicated buffer memory space, simplified code * dma rewrite, needs testing * moved xml * dd basics * timing * 64dd working yet again, isv brought back, dma fixes, usb path rewrite, pc code rewrite * added usb read functionality, general cleanup * changed mem addressing * added fpga flash update access * added mcu update * chmod * little cleanup * update format and stuff * fixes * uninitialized fix * small fixes * update fixes * update stuff done * fpga update tested * build time fix * boot fix * test timing * readme test * test 2 * reports * testseet * final * build test * forgot * button and naming * General cleanup And multiline commit message test * Exception screen UI touch ups * display separation and tests beginning * pc software update * pc software done * timing test * delete launch.json * sw fixes * fixed button hole diameter in shell * small cleanup, rpi testing * shell fillet fix, pc rtc printing * added cfg lock mechanism * moved lock to cfg address space * extended ROM and ISV fixes * preliminary sd card support * little sd card cleanup * sd menu fixes * 5 second limit * reduced shell thickness * basic led act blinking * faster sd menu loading * inst cache invalidate * sd card writing is working * SD card CSD and CID registers * wait for previous command * led error codes * fixed cfg_translate_address use * 64dd from sd card working * 64dd speedup and button handling * delayed address latching cycle - might break other builds, needs testing * bootloader improvements * small fixes * return previous cfg when setting new * cache stuff * unfloader debug protocol support * UNFLoader style debug command line support * requirements.txt * shell groove fillet * reset state inside controller * fixed fast PI read, added PI R/W fifo debug info * PI access prioritize * SD clock stop when RX FIFO is more than half full * flash erase method change * CFG error handling, TLOZ MM debug ISV support * CIC5167 support * general fixes * USB unplugged cable handling * turn off led when changing between error/act modes * rtc 2 bit clock stop support * line endings * Revert "line endings" This reverts commit d0ddfe5ec716d2db7c72561703f51a94bf34e6bb. * PI address debug * readme test * diagram update * diagram background * diagram background * diagram background * updated readme
290 lines
6.9 KiB
C
290 lines
6.9 KiB
C
#include "fpga.h"
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#include "hw.h"
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#include "led.h"
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#include "rtc.h"
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#include "task.h"
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#define RTC_I2C_ADDRESS (0xDE)
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#define RTC_ADDRESS_RTCSEC (0x00)
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#define RTC_ADDRESS_RTCMIN (0x01)
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#define RTC_ADDRESS_RTCHOUR (0x02)
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#define RTC_ADDRESS_RTCWKDAY (0x03)
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#define RTC_ADDRESS_RTCDATE (0x04)
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#define RTC_ADDRESS_RTCMTH (0x05)
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#define RTC_ADDRESS_RTCYEAR (0x06)
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#define RTC_ADDRESS_CONTROL (0x07)
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#define RTC_ADDRESS_OSCTRIM (0x08)
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#define RTC_ADDRESS_SRAM_MAGIC (0x20)
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#define RTC_ADDRESS_SRAM_REGION (0x24)
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#define RTC_RTCSEC_ST (1 << 7)
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#define RTC_RTCWKDAY_VBATEN (1 << 3)
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#define RTC_RTCWKDAY_OSCRUN (1 << 5)
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static uint8_t rtc_region = 0xFF;
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static volatile bool rtc_region_pending = false;
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static rtc_time_t rtc_time = {
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.second = 0x00,
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.minute = 0x00,
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.hour = 0x12,
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.weekday = 0x02,
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.day = 0x01,
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.month = 0x03,
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.year = 0x22
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};
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static bool rtc_time_valid = false;
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static volatile bool rtc_time_pending = false;
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static const uint8_t rtc_regs_bit_mask[7] = {
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0b01111111,
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0b01111111,
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0b00111111,
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0b00000111,
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0b00111111,
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0b00011111,
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0b11111111
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};
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static void rtc_task_resume (void) {
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task_set_ready(TASK_ID_RTC);
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}
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static void rtc_on_error (void) {
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rtc_time_valid = false;
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led_blink_error(LED_ERROR_RTC);
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task_yield();
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}
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static void rtc_read (uint8_t address, uint8_t *data, uint8_t length) {
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hw_i2c_read(RTC_I2C_ADDRESS, address, data, length, rtc_task_resume);
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task_yield();
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if (hw_i2c_get_error()) {
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rtc_on_error();
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}
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}
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static void rtc_write (uint8_t address, uint8_t *data, uint8_t length) {
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hw_i2c_write(RTC_I2C_ADDRESS, address, data, length, rtc_task_resume);
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task_yield();
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if (hw_i2c_get_error()) {
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rtc_on_error();
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}
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}
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static void rtc_sanitize_time (uint8_t *regs) {
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for (int i = 0; i < 7; i++) {
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regs[i] &= rtc_regs_bit_mask[i];
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}
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}
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static void rtc_wait_osc (bool running) {
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uint8_t rtcwkday;
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while (1) {
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rtc_read(RTC_ADDRESS_RTCWKDAY, &rtcwkday, 1);
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if (running && (rtcwkday & RTC_RTCWKDAY_OSCRUN)) {
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return;
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} else if (!running && (!(rtcwkday & RTC_RTCWKDAY_OSCRUN))) {
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return;
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}
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}
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}
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static void rtc_read_time (void) {
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uint8_t regs[7];
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rtc_read(RTC_ADDRESS_RTCSEC, regs, 7);
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rtc_sanitize_time(regs);
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if (!rtc_time_pending) {
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rtc_time.second = regs[0];
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rtc_time.minute = regs[1];
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rtc_time.hour = regs[2];
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rtc_time.weekday = regs[3];
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rtc_time.day = regs[4];
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rtc_time.month = regs[5];
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rtc_time.year = regs[6];
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rtc_time_valid = true;
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}
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}
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static void rtc_write_time (void) {
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uint8_t regs[7];
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regs[0] = 0x00;
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rtc_write(RTC_ADDRESS_RTCSEC, regs, 1);
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rtc_wait_osc(false);
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regs[0] = rtc_time.second;
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regs[1] = rtc_time.minute;
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regs[2] = rtc_time.hour;
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regs[3] = rtc_time.weekday;
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regs[4] = rtc_time.day;
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regs[5] = rtc_time.month;
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regs[6] = rtc_time.year;
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rtc_sanitize_time(regs);
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regs[0] |= RTC_RTCSEC_ST;
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regs[3] |= (RTC_RTCWKDAY_OSCRUN | RTC_RTCWKDAY_VBATEN);
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rtc_write(RTC_ADDRESS_RTCSEC, regs, 7);
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rtc_wait_osc(true);
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}
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static void rtc_read_region (void) {
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rtc_read(RTC_ADDRESS_SRAM_REGION, &rtc_region, 1);
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}
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static void rtc_write_region (void) {
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rtc_write(RTC_ADDRESS_SRAM_REGION, &rtc_region, 1);
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}
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static void rtc_init (void) {
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bool uninitialized = false;
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const char *magic = "SC64";
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uint8_t buffer[4];
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rtc_read(RTC_ADDRESS_SRAM_MAGIC, buffer, 4);
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for (int i = 0; i < 4; i++) {
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if (buffer[i] != magic[i]) {
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uninitialized = true;
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break;
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}
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}
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if (uninitialized) {
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buffer[0] = 0;
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rtc_write(RTC_ADDRESS_SRAM_MAGIC, (uint8_t *) (magic), 4);
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rtc_write(RTC_ADDRESS_OSCTRIM, buffer, 1);
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rtc_write_time();
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rtc_write_region();
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}
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}
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bool rtc_get_time (rtc_time_t *time) {
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bool vaild;
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hw_i2c_disable_irq();
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hw_tim_disable_irq(TIM_ID_RTC);
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time->second = rtc_time.second;
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time->minute = rtc_time.minute;
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time->hour = rtc_time.hour;
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time->weekday = rtc_time.weekday;
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time->day = rtc_time.day;
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time->month = rtc_time.month;
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time->year = rtc_time.year;
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vaild = rtc_time_valid;
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hw_tim_enable_irq(TIM_ID_RTC);
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hw_i2c_enable_irq();
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return vaild;
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}
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void rtc_set_time (rtc_time_t *time) {
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hw_i2c_disable_irq();
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hw_tim_disable_irq(TIM_ID_RTC);
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rtc_time.second = time->second;
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rtc_time.minute = time->minute;
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rtc_time.hour = time->hour;
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rtc_time.weekday = time->weekday;
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rtc_time.day = time->day;
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rtc_time.month = time->month;
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rtc_time.year = time->year;
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rtc_time_pending = true;
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hw_tim_enable_irq(TIM_ID_RTC);
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hw_i2c_enable_irq();
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}
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uint8_t rtc_get_region (void) {
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return rtc_region;
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}
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void rtc_set_region (uint8_t region) {
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rtc_region = region;
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rtc_region_pending = true;
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}
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void rtc_task (void) {
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rtc_init();
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rtc_read_region();
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while (1) {
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if (rtc_time_pending) {
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rtc_time_pending = false;
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rtc_write_time();
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}
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if (rtc_region_pending) {
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rtc_region_pending = false;
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rtc_write_region();
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}
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rtc_read_time();
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hw_tim_setup(TIM_ID_RTC, 50, rtc_task_resume);
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task_yield();
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}
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}
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void rtc_process (void) {
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rtc_time_t time;
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uint32_t data[2];
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uint32_t scr = fpga_reg_get(REG_RTC_SCR);
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if ((scr & RTC_SCR_PENDING) && ((scr & RTC_SCR_MAGIC_MASK) == RTC_SCR_MAGIC)) {
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data[0] = fpga_reg_get(REG_RTC_TIME_0);
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data[1] = fpga_reg_get(REG_RTC_TIME_1);
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time.weekday = ((data[0] >> 24) & 0xFF) + 1;
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time.hour = ((data[0] >> 16) & 0xFF);
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time.minute = ((data[0] >> 8) & 0xFF);
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time.second = ((data[0] >> 0) & 0xFF);
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time.year = ((data[1] >> 16) & 0xFF);
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time.month = ((data[1] >> 8) & 0xFF);
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time.day = ((data[1] >> 0) & 0xFF);
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rtc_set_time(&time);
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fpga_reg_set(REG_RTC_TIME_0, data[0]);
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fpga_reg_set(REG_RTC_TIME_1, data[1]);
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fpga_reg_set(REG_RTC_SCR, RTC_SCR_DONE);
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}
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rtc_get_time(&time);
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data[0] = (
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((time.weekday - 1) << 24) |
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(time.hour << 16) |
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(time.minute << 8) |
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(time.second << 0)
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);
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data[1] = (
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(time.year << 16) |
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(time.month << 8) |
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(time.day << 0)
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);
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fpga_reg_set(REG_RTC_TIME_0, data[0]);
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fpga_reg_set(REG_RTC_TIME_1, data[1]);
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}
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