SummerCart64/fw/rtl/n64/n64_scb.sv
Mateusz Faderewski ff69030643
[SC64][FW][HW][SW] New version based on LCMXO2 FPGA (#19)
* isv support + usb/dd improvements

* make room for saves

* update offset

* fixed debug address

* idk

* exception

* ironed out all broken stuff

* cleanup

* return epc fix

* better

* more cleanup

* even more cleanup

* mooore cleanup

* fixed printf

* no assert

* improved docker build, pyft232 instead of pyserial

* fixed displaying long message strings

description test

* just straight cleanup

* smallest cleanup

* PAL

* cpu buffer

* n64 bootloader done

* super slow usb storage reading implemented

* reduced buffer size

* usb gets fast

* little cleanup

* double buffered reads

* removed separate event id

* ISV in hardware finally

* small exception changes

* mac testing

* py spacing

* fsd write, rtc, isv and reset fixes

* fixxx

* good stopping point

* usb fixed?

* pretend we have 128 MB sdram

* backup

* chmod

* test

* test done

* more tests

* user rm

* help

* final fix

* updated component values

* nice asset names

* cic 64dd support

* ddipl enable separation

* pre DMA rewrite, created dedicated buffer memory space, simplified code

* dma rewrite, needs testing

* moved xml

* dd basics

* timing

* 64dd working yet again, isv brought back, dma fixes, usb path rewrite, pc code rewrite

* added usb read functionality, general cleanup

* changed mem addressing

* added fpga flash update access

* added mcu update

* chmod

* little cleanup

* update format and stuff

* fixes

* uninitialized fix

* small fixes

* update fixes

* update stuff done

* fpga update tested

* build time fix

* boot fix

* test timing

* readme test

* test 2

* reports

* testseet

* final

* build test

* forgot

* button and naming

* General cleanup

And multiline commit message test

* Exception screen UI touch ups

* display separation and tests beginning

* pc software update

* pc software done

* timing test

* delete launch.json

* sw fixes

* fixed button hole diameter in shell

* small cleanup, rpi testing

* shell fillet fix, pc rtc printing

* added cfg lock mechanism

* moved lock to cfg address space

* extended ROM and ISV fixes

* preliminary sd card support

* little sd card cleanup

* sd menu fixes

* 5 second limit

* reduced shell thickness

* basic led act blinking

* faster sd menu loading

* inst cache invalidate

* sd card writing is working

* SD card CSD and CID registers

* wait for previous command

* led error codes

* fixed cfg_translate_address use

* 64dd from sd card working

* 64dd speedup and button handling

* delayed address latching cycle - might break other builds, needs testing

* bootloader improvements

* small fixes

* return previous cfg when setting new

* cache stuff

* unfloader debug protocol support

* UNFLoader style debug command line support

* requirements.txt

* shell groove fillet

* reset state inside controller

* fixed fast PI read, added PI R/W fifo debug info

* PI access prioritize

* SD clock stop when RX FIFO is more than half full

* flash erase method change

* CFG error handling, TLOZ MM debug ISV support

* CIC5167 support

* general fixes

* USB unplugged cable handling

* turn off led when changing between error/act modes

* rtc 2 bit clock stop support

* line endings

* Revert "line endings"

This reverts commit d0ddfe5ec7.

* PI address debug

* readme test

* diagram update

* diagram background

* diagram background

* diagram background

* updated readme
2022-11-10 11:46:54 +01:00

198 lines
4.5 KiB
Systemverilog

interface n64_scb ();
logic n64_reset;
logic n64_nmi;
logic bootloader_enabled;
logic rom_write_enabled;
logic rom_shadow_enabled;
logic rom_extended_enabled;
logic sram_enabled;
logic sram_banked;
logic flashram_enabled;
logic dd_enabled;
logic ddipl_enabled;
logic eeprom_enabled;
logic eeprom_16k_mode;
logic dd_write;
logic [6:0] dd_address;
logic [15:0] dd_rdata;
logic [15:0] dd_wdata;
logic flashram_pending;
logic flashram_done;
logic [9:0] flashram_sector;
logic flashram_sector_or_all;
logic flashram_write_or_erase;
logic flashram_read_mode;
logic flashram_write;
logic [5:0] flashram_address;
logic [15:0] flashram_wdata;
logic eeprom_write;
logic [10:0] eeprom_address;
logic [7:0] eeprom_rdata;
logic [7:0] eeprom_wdata;
logic rtc_pending;
logic rtc_done;
logic rtc_wdata_valid;
logic [41:0] rtc_rdata;
logic [41:0] rtc_wdata;
logic cfg_unlock;
logic cfg_pending;
logic cfg_done;
logic cfg_error;
logic cfg_irq;
logic [7:0] cfg_cmd;
logic [31:0] cfg_rdata [0:1];
logic [31:0] cfg_wdata [0:1];
logic [31:0] cfg_version;
logic pi_sdram_active;
logic pi_flash_active;
logic [35:0] pi_debug;
modport controller (
input n64_reset,
input n64_nmi,
output bootloader_enabled,
output rom_write_enabled,
output rom_shadow_enabled,
output rom_extended_enabled,
output sram_enabled,
output sram_banked,
output flashram_enabled,
output dd_enabled,
output ddipl_enabled,
output eeprom_enabled,
output eeprom_16k_mode,
input flashram_pending,
output flashram_done,
input flashram_sector,
input flashram_sector_or_all,
input flashram_write_or_erase,
input rtc_pending,
output rtc_done,
output rtc_wdata_valid,
input rtc_rdata,
output rtc_wdata,
input cfg_pending,
output cfg_done,
output cfg_error,
output cfg_irq,
input cfg_cmd,
input cfg_rdata,
output cfg_wdata,
output cfg_version,
input pi_debug
);
modport pi (
output n64_reset,
output n64_nmi,
input bootloader_enabled,
input rom_write_enabled,
input rom_shadow_enabled,
input rom_extended_enabled,
input sram_enabled,
input sram_banked,
input flashram_enabled,
input dd_enabled,
input ddipl_enabled,
input flashram_read_mode,
input cfg_unlock,
output pi_sdram_active,
output pi_flash_active,
output pi_debug
);
modport flashram (
output flashram_pending,
input flashram_done,
output flashram_sector,
output flashram_sector_or_all,
output flashram_write_or_erase,
output flashram_read_mode,
output flashram_write,
output flashram_address,
output flashram_wdata
);
modport si (
input eeprom_enabled,
input eeprom_16k_mode,
output eeprom_write,
output eeprom_address,
input eeprom_rdata,
output eeprom_wdata,
output rtc_pending,
input rtc_done,
input rtc_wdata_valid,
output rtc_rdata,
input rtc_wdata
);
modport dd (
input n64_reset,
input n64_nmi,
output dd_write,
output dd_address,
input dd_rdata,
output dd_wdata
);
modport bram (
input flashram_write,
input flashram_address,
input flashram_wdata,
input eeprom_write,
input eeprom_address,
output eeprom_rdata,
input eeprom_wdata,
input dd_write,
input dd_address,
output dd_rdata,
input dd_wdata
);
modport cfg (
input n64_reset,
input n64_nmi,
output cfg_unlock,
output cfg_pending,
input cfg_done,
input cfg_error,
input cfg_irq,
output cfg_cmd,
output cfg_rdata,
input cfg_wdata,
input cfg_version
);
modport arbiter (
input pi_sdram_active,
input pi_flash_active
);
endinterface