182 lines
7.5 KiB
C
182 lines
7.5 KiB
C
#include <dynamic_libs/os_defs.h>
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#include <dynamic_libs/os_functions.h>
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#include "kernel_defs.h"
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#include <kernel/syscalls.h>
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static void KernelReadSRs(sr_table_t * table) {
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uint32_t i = 0;
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// calculate PT_size ((end-start)*8/4096)*4 or (end-start)/128
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// Minimum page table size is 64Kbytes.
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asm volatile("eieio; isync");
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asm volatile("mfspr %0, 25" : "=r" (table->sdr1));
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asm volatile("mfsr %0, 0" : "=r" (table->value[i]));
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i++;
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asm volatile("mfsr %0, 1" : "=r" (table->value[i]));
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i++;
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asm volatile("mfsr %0, 2" : "=r" (table->value[i]));
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i++;
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asm volatile("mfsr %0, 3" : "=r" (table->value[i]));
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i++;
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asm volatile("mfsr %0, 4" : "=r" (table->value[i]));
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i++;
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asm volatile("mfsr %0, 5" : "=r" (table->value[i]));
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i++;
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asm volatile("mfsr %0, 6" : "=r" (table->value[i]));
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i++;
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asm volatile("mfsr %0, 7" : "=r" (table->value[i]));
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i++;
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asm volatile("mfsr %0, 8" : "=r" (table->value[i]));
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i++;
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asm volatile("mfsr %0, 9" : "=r" (table->value[i]));
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i++;
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asm volatile("mfsr %0, 10" : "=r" (table->value[i]));
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i++;
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asm volatile("mfsr %0, 11" : "=r" (table->value[i]));
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i++;
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asm volatile("mfsr %0, 12" : "=r" (table->value[i]));
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i++;
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asm volatile("mfsr %0, 13" : "=r" (table->value[i]));
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i++;
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asm volatile("mfsr %0, 14" : "=r" (table->value[i]));
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i++;
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asm volatile("mfsr %0, 15" : "=r" (table->value[i]));
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i++;
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asm volatile("eieio; isync");
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}
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static void KernelWriteSRs(sr_table_t * table) {
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uint32_t i = 0;
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asm volatile("eieio; isync");
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// Writing didn't work for all at once so we only write number 8.
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// TODO: fix this and change it if required.
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/*asm volatile("mtsr 0, %0" : : "r" (table->value[i])); i++;
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asm volatile("mtsr 1, %0" : : "r" (table->value[i])); i++;
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asm volatile("mtsr 2, %0" : : "r" (table->value[i])); i++;
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asm volatile("mtsr 3, %0" : : "r" (table->value[i])); i++;
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asm volatile("mtsr 4, %0" : : "r" (table->value[i])); i++;
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asm volatile("mtsr 5, %0" : : "r" (table->value[i])); i++;*/
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//asm volatile("mtsr 6, %0" : : "r" (table->value[6])); i++;
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/*asm volatile("mtsr 7, %0" : : "r" (table->value[i])); i++;*/
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asm volatile("mtsr 8, %0" : : "r" (table->value[8]));
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i++;
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/*asm volatile("mtsr 9, %0" : : "r" (table->value[i])); i++;
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asm volatile("mtsr 10, %0" : : "r" (table->value[i])); i++;
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asm volatile("mtsr 11, %0" : : "r" (table->value[i])); i++;
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asm volatile("mtsr 12, %0" : : "r" (table->value[i])); i++;
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asm volatile("mtsr 13, %0" : : "r" (table->value[i])); i++;
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asm volatile("mtsr 14, %0" : : "r" (table->value[i])); i++;
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asm volatile("mtsr 15, %0" : : "r" (table->value[i])); i++;*/
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asm volatile("isync");
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}
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void KernelReadPTE(uint32_t* dest, uint32_t size) {
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uint32_t msr = 0;
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uint32_t oldmsr = 0;
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//TODO: Calculate from SDR1
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uint32_t addr_base = 0xFFE20000;
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asm volatile("mfmsr %0" : "=r" (msr));
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oldmsr = msr;
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msr &= ~0x10;
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for(uint32_t i = 0; i<size/0x04; i++) {
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uint32_t value_read = 0;
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uint32_t addr = addr_base + (i*4);
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// Disable Data address translation
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asm volatile("mtmsr %0" : : "r" (msr));
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__asm __volatile("lwz %0,0(%1)" : "=r"(value_read) : "r"(addr));
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// Enable Data address translation
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asm volatile("mtmsr %0" : : "r" (oldmsr));
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dest[i] = value_read;
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}
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}
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void KernelWritePTE(uint32_t * in_addr, uint32_t size) {
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uint32_t msr = 0;
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uint32_t oldmsr = 0;
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//TODO: Calculate from SDR1
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uint32_t addr_base = 0xFFE20000;
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asm volatile("mfmsr %0" : "=r" (msr));
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oldmsr = msr;
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msr &= ~0x10;
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for(uint32_t i = 0; i<size/0x04; i++) {
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uint32_t addr = addr_base + (i*4);
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uint32_t value = in_addr[i];
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// Disable Data address translation
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asm volatile("mtmsr %0" : : "r" (msr));
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__asm __volatile("stw %0,0(%1)" : : "r"(value),"r"(addr));
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// Enable Data address translation
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asm volatile("mtmsr %0" : : "r" (oldmsr));
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}
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}
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void KernelWriteWitoutDAT(uint32_t addr, uint32_t value) {
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uint32_t msr = 0;
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uint32_t oldmsr = 0;
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//TODO: Calculate from SDR1
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//uint32_t addr_base = 0xFFE20000;
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asm volatile("mfmsr %0" : "=r" (msr));
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oldmsr = msr;
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msr &= ~0x10;
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// Disable Data address translation
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asm volatile("mtmsr %0" : : "r" (msr));
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__asm __volatile("stw %0,0(%1)" : : "r"(value),"r"(addr));
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// Enable Data address translation
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asm volatile("mtmsr %0" : : "r" (oldmsr));
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}
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void SC0x0A_KernelWriteWitoutDAT(uint32_t addr,uint32_t value);
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void wups_init_kernel_syscalls() {
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//! assign 1 so that this variable gets into the retained .data section
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static uint8_t ucSyscallsSetupRequired = 1;
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if(!ucSyscallsSetupRequired)
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return;
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ucSyscallsSetupRequired = 0;
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kern_write((void*)(OS_SPECIFICS->addr_KernSyscallTbl1 + (0x0A * 4)), (uint32_t)KernelWriteWitoutDAT);
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kern_write((void*)(OS_SPECIFICS->addr_KernSyscallTbl2 + (0x0A * 4)), (uint32_t)KernelWriteWitoutDAT);
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kern_write((void*)(OS_SPECIFICS->addr_KernSyscallTbl3 + (0x0A * 4)), (uint32_t)KernelWriteWitoutDAT);
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kern_write((void*)(OS_SPECIFICS->addr_KernSyscallTbl4 + (0x0A * 4)), (uint32_t)KernelWriteWitoutDAT);
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kern_write((void*)(OS_SPECIFICS->addr_KernSyscallTbl5 + (0x0A * 4)), (uint32_t)KernelWriteWitoutDAT);
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// Override all writes to SR8 with nops.
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SC0x0A_KernelWriteWitoutDAT(0xFFF1D754,0x60000000);
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SC0x0A_KernelWriteWitoutDAT(0xFFF1D64C,0x60000000);
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SC0x0A_KernelWriteWitoutDAT(0xFFE00638,0x60000000);
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kern_write((void*)(OS_SPECIFICS->addr_KernSyscallTbl1 + (0x36 * 4)), (uint32_t)KernelReadSRs);
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kern_write((void*)(OS_SPECIFICS->addr_KernSyscallTbl2 + (0x36 * 4)), (uint32_t)KernelReadSRs);
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kern_write((void*)(OS_SPECIFICS->addr_KernSyscallTbl3 + (0x36 * 4)), (uint32_t)KernelReadSRs);
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kern_write((void*)(OS_SPECIFICS->addr_KernSyscallTbl4 + (0x36 * 4)), (uint32_t)KernelReadSRs);
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kern_write((void*)(OS_SPECIFICS->addr_KernSyscallTbl5 + (0x36 * 4)), (uint32_t)KernelReadSRs);
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kern_write((void*)(OS_SPECIFICS->addr_KernSyscallTbl1 + (0x37 * 4)), (uint32_t)KernelReadPTE);
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kern_write((void*)(OS_SPECIFICS->addr_KernSyscallTbl2 + (0x37 * 4)), (uint32_t)KernelReadPTE);
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kern_write((void*)(OS_SPECIFICS->addr_KernSyscallTbl3 + (0x37 * 4)), (uint32_t)KernelReadPTE);
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kern_write((void*)(OS_SPECIFICS->addr_KernSyscallTbl4 + (0x37 * 4)), (uint32_t)KernelReadPTE);
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kern_write((void*)(OS_SPECIFICS->addr_KernSyscallTbl5 + (0x37 * 4)), (uint32_t)KernelReadPTE);
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kern_write((void*)(OS_SPECIFICS->addr_KernSyscallTbl1 + (0x09 * 4)), (uint32_t)KernelWritePTE);
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kern_write((void*)(OS_SPECIFICS->addr_KernSyscallTbl2 + (0x09 * 4)), (uint32_t)KernelWritePTE);
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kern_write((void*)(OS_SPECIFICS->addr_KernSyscallTbl3 + (0x09 * 4)), (uint32_t)KernelWritePTE);
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kern_write((void*)(OS_SPECIFICS->addr_KernSyscallTbl4 + (0x09 * 4)), (uint32_t)KernelWritePTE);
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kern_write((void*)(OS_SPECIFICS->addr_KernSyscallTbl5 + (0x09 * 4)), (uint32_t)KernelWritePTE);
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kern_write((void*)(OS_SPECIFICS->addr_KernSyscallTbl1 + (0x0A * 4)), (uint32_t)KernelWriteSRs);
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kern_write((void*)(OS_SPECIFICS->addr_KernSyscallTbl2 + (0x0A * 4)), (uint32_t)KernelWriteSRs);
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kern_write((void*)(OS_SPECIFICS->addr_KernSyscallTbl3 + (0x0A * 4)), (uint32_t)KernelWriteSRs);
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kern_write((void*)(OS_SPECIFICS->addr_KernSyscallTbl4 + (0x0A * 4)), (uint32_t)KernelWriteSRs);
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kern_write((void*)(OS_SPECIFICS->addr_KernSyscallTbl5 + (0x0A * 4)), (uint32_t)KernelWriteSRs);
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}
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