mirror of
https://github.com/Mr-Wiseguy/Zelda64Recomp.git
synced 2024-11-07 15:15:05 +01:00
222 lines
6.6 KiB
C
222 lines
6.6 KiB
C
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#ifndef __ULTRA64_MULTILIBULTRA_H__
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#define __ULTRA64_MULTILIBULTRA_H__
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#include <stdint.h>
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#include "platform_specific.h"
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#ifdef __cplusplus
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#include <queue>
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#endif
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#ifdef __GNUC__
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#define UNUSED __attribute__((unused))
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#define ALIGNED(x) __attribute__((aligned(x)))
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#else
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#define UNUSED
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#define ALIGNED(x)
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#endif
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typedef int64_t s64;
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typedef uint64_t u64;
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typedef int32_t s32;
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typedef uint32_t u32;
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typedef int16_t s16;
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typedef uint16_t u16;
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typedef int8_t s8;
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typedef uint8_t u8;
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#define PTR(x) int32_t
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#define RDRAM_ARG uint8_t *rdram,
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#define RDRAM_ARG1 uint8_t *rdram
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#define PASS_RDRAM rdram,
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#define PASS_RDRAM1 rdram
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#define TO_PTR(type, var) ((type*)(&rdram[(uint64_t)var - 0xFFFFFFFF80000000]))
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#ifdef __cplusplus
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#define NULLPTR (PTR(void))0
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#endif
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#ifndef NULL
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#define NULL (PTR(void) 0)
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#endif
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#define OS_MESG_NOBLOCK 0
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#define OS_MESG_BLOCK 1
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typedef s32 OSPri;
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typedef s32 OSId;
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typedef u64 OSTime;
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#define OS_EVENT_SW1 0 /* CPU SW1 interrupt */
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#define OS_EVENT_SW2 1 /* CPU SW2 interrupt */
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#define OS_EVENT_CART 2 /* Cartridge interrupt: used by rmon */
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#define OS_EVENT_COUNTER 3 /* Counter int: used by VI/Timer Mgr */
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#define OS_EVENT_SP 4 /* SP task done interrupt */
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#define OS_EVENT_SI 5 /* SI (controller) interrupt */
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#define OS_EVENT_AI 6 /* AI interrupt */
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#define OS_EVENT_VI 7 /* VI interrupt: used by VI/Timer Mgr */
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#define OS_EVENT_PI 8 /* PI interrupt: used by PI Manager */
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#define OS_EVENT_DP 9 /* DP full sync interrupt */
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#define OS_EVENT_CPU_BREAK 10 /* CPU breakpoint: used by rmon */
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#define OS_EVENT_SP_BREAK 11 /* SP breakpoint: used by rmon */
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#define OS_EVENT_FAULT 12 /* CPU fault event: used by rmon */
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#define OS_EVENT_THREADSTATUS 13 /* CPU thread status: used by rmon */
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#define OS_EVENT_PRENMI 14 /* Pre NMI interrupt */
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#define M_GFXTASK 1
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#define M_AUDTASK 2
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#define M_VIDTASK 3
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#define M_NJPEGTASK 4
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/////////////
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// Structs //
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/////////////
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// Threads
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typedef struct UltraThreadContext UltraThreadContext;
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typedef enum {
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RUNNING,
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PAUSED,
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PREEMPTED
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} OSThreadState;
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typedef struct OSThread_t {
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PTR(struct OSThread_t) next; // Next thread in the given queue
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OSPri priority;
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uint32_t pad1;
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uint32_t pad2;
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uint16_t flags; // These two are swapped to reflect rdram byteswapping
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uint16_t state;
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OSId id;
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int32_t pad3;
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UltraThreadContext* context; // An actual pointer regardless of platform
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int32_t sp;
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} OSThread;
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typedef u32 OSEvent;
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typedef PTR(void) OSMesg;
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typedef struct OSMesgQueue {
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PTR(OSThread) blocked_on_recv; /* Linked list of threads blocked on receiving from this queue */
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PTR(OSThread) blocked_on_send; /* Linked list of threads blocked on sending to this queue */
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s32 validCount; /* Number of messages in the queue */
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s32 first; /* Index of the first message in the ring buffer */
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s32 msgCount; /* Size of message buffer */
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PTR(OSMesg) msg; /* Pointer to circular buffer to store messages */
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} OSMesgQueue;
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// RSP
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typedef struct {
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u32 type;
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u32 flags;
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PTR(u64) ucode_boot;
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u32 ucode_boot_size;
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PTR(u64) ucode;
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u32 ucode_size;
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PTR(u64) ucode_data;
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u32 ucode_data_size;
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PTR(u64) dram_stack;
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u32 dram_stack_size;
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PTR(u64) output_buff;
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PTR(u64) output_buff_size;
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PTR(u64) data_ptr;
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u32 data_size;
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PTR(u64) yield_data_ptr;
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u32 yield_data_size;
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} OSTask_t;
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typedef union {
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OSTask_t t;
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int64_t force_structure_alignment;
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} OSTask;
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// PI
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struct OSIoMesgHdr {
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// These 3 reversed due to endianness
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u8 status; /* Return status */
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u8 pri; /* Message priority (High or Normal) */
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u16 type; /* Message type */
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PTR(OSMesgQueue) retQueue; /* Return message queue to notify I/O completion */
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};
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struct OSIoMesg {
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OSIoMesgHdr hdr; /* Message header */
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PTR(void) dramAddr; /* RDRAM buffer address (DMA) */
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u32 devAddr; /* Device buffer address (DMA) */
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u32 size; /* DMA transfer size in bytes */
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u32 piHandle; /* PI device handle */
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};
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struct OSPiHandle {
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PTR(OSPiHandle_s) unused; /* point to next handle on the table */
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// These four members reversed due to endianness
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u8 relDuration; /* domain release duration */
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u8 pageSize; /* domain page size */
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u8 latency; /* domain latency */
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u8 type; /* DEVICE_TYPE_BULK for disk */
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// These three members reversed due to endianness
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u16 padding; /* struct alignment padding */
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u8 domain; /* which domain */
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u8 pulse; /* domain pulse width */
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u32 baseAddress; /* Domain address */
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u32 speed; /* for roms only */
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/* The following are "private" elements" */
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u32 transferInfo[18]; /* for disk only */
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};
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///////////////
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// Functions //
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///////////////
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#ifdef __cplusplus
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extern "C" {
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#endif // __cplusplus
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void osInitialize(void);
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typedef void (thread_func_t)(PTR(void));
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void osCreateThread(RDRAM_ARG PTR(OSThread) t, OSId id, PTR(thread_func_t) entry, PTR(void) arg, PTR(void) sp, OSPri p);
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void osStartThread(RDRAM_ARG PTR(OSThread) t);
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void osStopThread(RDRAM_ARG PTR(OSThread) t);
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void osDestroyThread(RDRAM_ARG PTR(OSThread) t);
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void osSetThreadPri(RDRAM_ARG PTR(OSThread) t, OSPri pri);
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OSPri osGetThreadPri(RDRAM_ARG PTR(OSThread) thread);
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OSId osGetThreadId(RDRAM_ARG PTR(OSThread) t);
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s32 MQ_GET_COUNT(RDRAM_ARG PTR(OSMesgQueue));
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s32 MQ_IS_EMPTY(RDRAM_ARG PTR(OSMesgQueue));
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s32 MQ_IS_FULL(RDRAM_ARG PTR(OSMesgQueue));
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void osCreateMesgQueue(RDRAM_ARG PTR(OSMesgQueue), PTR(OSMesg), s32);
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s32 osSendMesg(RDRAM_ARG PTR(OSMesgQueue), OSMesg, s32);
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s32 osJamMesg(RDRAM_ARG PTR(OSMesgQueue), OSMesg, s32);
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s32 osRecvMesg(RDRAM_ARG PTR(OSMesgQueue), PTR(OSMesg), s32);
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void osSetEventMesg(RDRAM_ARG OSEvent, PTR(OSMesgQueue), OSMesg);
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void osViSetEvent(RDRAM_ARG PTR(OSMesgQueue), OSMesg, u32);
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void osViSwapBuffer(RDRAM_ARG PTR(void) frameBufPtr);
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PTR(void) osViGetNextFramebuffer();
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PTR(void) osViGetCurrentFramebuffer();
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u32 osGetCount();
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OSTime osGetTime();
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int osSetTimer(RDRAM_ARG PTR(OSTimer) timer, OSTime countdown, OSTime interval, PTR(OSMesgQueue) mq, OSMesg msg);
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int osStopTimer(RDRAM_ARG PTR(OSTimer) timer);
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u32 osVirtualToPhysical(PTR(void) addr);
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#ifdef __cplusplus
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} // extern "C"
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#endif
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#endif
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