mirror of
https://github.com/fail0verflow/bootmii.git
synced 2024-11-22 11:29:25 +01:00
145 lines
2.6 KiB
ArmAsm
145 lines
2.6 KiB
ArmAsm
/*
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bootmii - a Free Software replacement for the Nintendo/BroadOn boot2.
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system startup
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Copyright (C) 2008, 2009 Hector Martin "marcan" <marcan@marcan.st>
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# This code is licensed to you under the terms of the GNU GPL, version 2;
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# see file COPYING or http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
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*/
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.arm
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.extern _main
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.extern __got_start
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.extern __got_end
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.extern __bss_start
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.extern __bss_end
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.extern __stack_addr
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.globl _start
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.globl debug_output
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.section .init
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_start:
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@ Get real address of _start
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sub r4, pc, #8
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@ Subtract offset to get the address that we were loaded at
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ldr r0, =_start
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sub r4, r4, r0
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@ Output 0x42 to the debug port
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mov r0, #0x42
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bl debug_output
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@ Set up a stack
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ldr sp, =__stack_addr
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add sp, r4
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@ perform boot2v3 memory controller poke
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bl memctrl_do_sub_sub_poke
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@ Output 0x43 to the debug port
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mov r0, #0x43
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bl debug_output
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@ check for a previous GOT relocation
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ldr r1, [pc, #_is_reloced - . - 8]
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cmp r1, #0
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bne done_got
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@ relocate the GOT entries
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ldr r1, =__got_start
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add r1, r4
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ldr r2, =__got_end
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add r2, r4
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got_loop:
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@ check for the end
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cmp r1, r2
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beq done_got
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@ read the GOT entry
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ldr r3, [r1]
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@ add our base address
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add r3, r4
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str r3, [r1]
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@ move on
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add r1, r1, #4
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b got_loop
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done_got:
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@ note that we have already reloced GOT
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mov r1, #1
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str r1, [pc, #_is_reloced - . - 8]
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@ clear BSS
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ldr r1, =__bss_start
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add r1, r4
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ldr r2, =__bss_end
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add r2, r4
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mov r3, #0
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bss_loop:
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@ check for the end
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cmp r1, r2
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beq done_bss
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@ clear the word and move on
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str r3, [r1]
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add r1, r1, #4
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b bss_loop
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done_bss:
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mov r0, #0x44
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bl debug_output
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@ take the plunge
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mov r0, r4
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bl _main
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@ _main returned! Go to whatever address it returned...
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mov r1, r0
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mov r0, r4
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mov pc, r1
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_is_reloced:
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.long 0
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memctrl_do_sub_sub_poke:
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stmdb sp!, {lr}
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ldr r0, =0x163 @ reg_address
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mov r1, #0x4C @ address
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bl memctrl_sub_poke
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ldr r0, =0x163 @ read address back (flush?)
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bl memctrl_sub_peek
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ldr r0, =0x162 @ reg_data
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mov r1, #1 @ data
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bl memctrl_sub_poke
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ldmia sp!, {pc}
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memctrl_sub_poke:
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ldr r2, =0xD8B4000
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strh r0, [r2, #0x74] @ reg_address <= address
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ldrh r0, [r2, #0x74] @ read reg_address back
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strh r1, [r2, #0x76] @ reg_data <= data
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mov pc, lr
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memctrl_sub_peek:
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ldr r2, =0xD8B4000
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strh r0, [r2, #0x74] @ reg_address <= address
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ldrh r0, [r2, #0x74] @ read reg_address back
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ldrh r0, [r2, #0x76] @ data <= reg_data
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mov pc, lr
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.pool
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debug_output:
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@ load address of port
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mov r3, #0xd800000
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@ load old value
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ldr r2, [r3, #0xe0]
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@ clear debug byte
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bic r2, r2, #0xFF0000
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@ insert new value
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and r0, r0, #0xFF
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orr r2, r2, r0, LSL #16
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@ store back
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str r2, [r3, #0xe0]
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mov pc, lr
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