2011-12-02 16:40:11 +01:00
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# ----------------------------------------------------------------------
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#
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# Misc constants
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#
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UA_MAXOP = 6
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# ----------------------------------------------------------------------
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# instruc_t related constants
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#
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# instruc_t.feature
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#
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CF_STOP = 0x00001 # Instruction doesn't pass execution to the next instruction
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CF_CALL = 0x00002 # CALL instruction (should make a procedure here)
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CF_CHG1 = 0x00004 # The instruction modifies the first operand
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CF_CHG2 = 0x00008 # The instruction modifies the second operand
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CF_CHG3 = 0x00010 # The instruction modifies the third operand
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CF_CHG4 = 0x00020 # The instruction modifies 4 operand
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CF_CHG5 = 0x00040 # The instruction modifies 5 operand
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CF_CHG6 = 0x00080 # The instruction modifies 6 operand
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CF_USE1 = 0x00100 # The instruction uses value of the first operand
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CF_USE2 = 0x00200 # The instruction uses value of the second operand
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CF_USE3 = 0x00400 # The instruction uses value of the third operand
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CF_USE4 = 0x00800 # The instruction uses value of the 4 operand
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CF_USE5 = 0x01000 # The instruction uses value of the 5 operand
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CF_USE6 = 0x02000 # The instruction uses value of the 6 operand
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CF_JUMP = 0x04000 # The instruction passes execution using indirect jump or call (thus needs additional analysis)
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CF_SHFT = 0x08000 # Bit-shift instruction (shl,shr...)
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CF_HLL = 0x10000 # Instruction may be present in a high level language function.
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# ----------------------------------------------------------------------
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# op_t related constants
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#
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# op_t.type
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2015-02-08 03:59:53 +01:00
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# Description Data field
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o_void = 0 # No Operand ----------
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o_reg = 1 # General Register (al,ax,es,ds...) reg
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o_mem = 2 # Direct Memory Reference (DATA) addr
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o_phrase = 3 # Memory Ref [Base Reg + Index Reg] phrase
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o_displ = 4 # Memory Reg [Base Reg + Index Reg + Displacement] phrase+addr
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o_imm = 5 # Immediate Value value
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o_far = 6 # Immediate Far Address (CODE) addr
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o_near = 7 # Immediate Near Address (CODE) addr
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o_idpspec0 = 8 # Processor specific type
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o_idpspec1 = 9 # Processor specific type
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o_idpspec2 = 10 # Processor specific type
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o_idpspec3 = 11 # Processor specific type
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o_idpspec4 = 12 # Processor specific type
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o_idpspec5 = 13 # Processor specific type
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# There can be more processor specific types
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2011-12-02 16:40:11 +01:00
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#
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# op_t.dtyp
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#
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dt_byte = 0 # 8 bit
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dt_word = 1 # 16 bit
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dt_dword = 2 # 32 bit
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dt_float = 3 # 4 byte
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dt_double = 4 # 8 byte
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dt_tbyte = 5 # variable size (ph.tbyte_size)
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dt_packreal = 6 # packed real format for mc68040
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dt_qword = 7 # 64 bit
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dt_byte16 = 8 # 128 bit
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dt_code = 9 # ptr to code (not used?)
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dt_void = 10 # none
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dt_fword = 11 # 48 bit
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dt_bitfild = 12 # bit field (mc680x0)
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dt_string = 13 # pointer to asciiz string
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dt_unicode = 14 # pointer to unicode string
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dt_3byte = 15 # 3-byte data
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dt_ldbl = 16 # long double (which may be different from tbyte)
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2013-03-06 08:44:10 +01:00
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dt_byte32 = 17 # 256 bit
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dt_byte64 = 18 # 512 bit
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2011-12-02 16:40:11 +01:00
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#
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# op_t.flags
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#
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OF_NO_BASE_DISP = 0x80 # o_displ: base displacement doesn't exist meaningful only for o_displ type if set, base displacement (x.addr) doesn't exist.
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OF_OUTER_DISP = 0x40 # o_displ: outer displacement exists meaningful only for o_displ type if set, outer displacement (x.value) exists.
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PACK_FORM_DEF = 0x20 # !o_reg + dt_packreal: packed factor defined
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OF_NUMBER = 0x10 # can be output as number only if set, the operand can be converted to a number only
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OF_SHOW = 0x08 # should the operand be displayed? if clear, the operand is hidden and should not be displayed
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#
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# insn_t.flags
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#
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INSN_MACRO = 0x01 # macro instruction
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INSN_MODMAC = 0x02 # macros: may modify the database to make room for the macro insn
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# ----------------------------------------------------------------------
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# asm_t related constants
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#
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# asm_t.flag
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#
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AS_OFFST = 0x00000001 # offsets are 'offset xxx' ?
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AS_COLON = 0x00000002 # create colons after data names ?
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AS_UDATA = 0x00000004 # can use '?' in data directives
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AS_2CHRE = 0x00000008 # double char constants are: "xy
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AS_NCHRE = 0x00000010 # char constants are: 'x
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AS_N2CHR = 0x00000020 # can't have 2 byte char consts
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# ASCII directives:
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AS_1TEXT = 0x00000040 # 1 text per line, no bytes
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AS_NHIAS = 0x00000080 # no characters with high bit
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AS_NCMAS = 0x00000100 # no commas in ascii directives
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AS_HEXFM = 0x00000E00 # format of hex numbers:
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ASH_HEXF0 = 0x00000000 # 34h
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ASH_HEXF1 = 0x00000200 # h'34
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ASH_HEXF2 = 0x00000400 # 34
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ASH_HEXF3 = 0x00000600 # 0x34
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ASH_HEXF4 = 0x00000800 # $34
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ASH_HEXF5 = 0x00000A00 # <^R > (radix)
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AS_DECFM = 0x00003000 # format of dec numbers:
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ASD_DECF0 = 0x00000000 # 34
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ASD_DECF1 = 0x00001000 # #34
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ASD_DECF2 = 0x00002000 # 34.
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ASD_DECF3 = 0x00003000 # .34
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AS_OCTFM = 0x0001C000 # format of octal numbers:
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ASO_OCTF0 = 0x00000000 # 123o
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ASO_OCTF1 = 0x00004000 # 0123
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ASO_OCTF2 = 0x00008000 # 123
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ASO_OCTF3 = 0x0000C000 # @123
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ASO_OCTF4 = 0x00010000 # o'123
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ASO_OCTF5 = 0x00014000 # 123q
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ASO_OCTF6 = 0x00018000 # ~123
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AS_BINFM = 0x000E0000 # format of binary numbers:
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ASB_BINF0 = 0x00000000 # 010101b
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ASB_BINF1 = 0x00020000 # ^B010101
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ASB_BINF2 = 0x00040000 # %010101
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ASB_BINF3 = 0x00060000 # 0b1010101
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ASB_BINF4 = 0x00080000 # b'1010101
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ASB_BINF5 = 0x000A0000 # b'1010101'
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AS_UNEQU = 0x00100000 # replace undefined data items
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# with EQU (for ANTA's A80)
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AS_ONEDUP = 0x00200000 # One array definition per line
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AS_NOXRF = 0x00400000 # Disable xrefs during the output file generation
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AS_XTRNTYPE = 0x00800000 # Assembler understands type of extrn
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# symbols as ":type" suffix
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AS_RELSUP = 0x01000000 # Checkarg: 'and','or','xor' operations
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# with addresses are possible
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AS_LALIGN = 0x02000000 # Labels at "align" keyword
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# are supported.
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AS_NOCODECLN = 0x04000000 # don't create colons after code names
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AS_NOTAB = 0x08000000 # Disable tabulation symbols during the output file generation
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AS_NOSPACE = 0x10000000 # No spaces in expressions
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AS_ALIGN2 = 0x20000000 # .align directive expects an exponent rather than a power of 2
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# (.align 5 means to align at 32byte boundary)
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AS_ASCIIC = 0x40000000 # ascii directive accepts C-like
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# escape sequences (\n,\x01 and similar)
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AS_ASCIIZ = 0x80000000 # ascii directive inserts implicit
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# zero byte at the end
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# ----------------------------------------------------------------------
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# processor_t related constants
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IDP_INTERFACE_VERSION = 76
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CUSTOM_CMD_ITYPE = 0x8000
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REG_SPOIL = 0x80000000
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REAL_ERROR_FORMAT = -1 # not supported format for current .idp
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REAL_ERROR_RANGE = -2 # number too big (small) for store (mem NOT modifyed)
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REAL_ERROR_BADDATA = -3 # illegal real data for load (IEEE data not filled)
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#
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# Check whether the operand is relative to stack pointer or frame pointer.
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# This function is used to determine how to output a stack variable
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# This function may be absent. If it is absent, then all operands
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# are sp based by default.
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# Define this function only if some stack references use frame pointer
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# instead of stack pointer.
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# returns flags:
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OP_FP_BASED = 0x00000000 # operand is FP based
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OP_SP_BASED = 0x00000001 # operand is SP based
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OP_SP_ADD = 0x00000000 # operand value is added to the pointer
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OP_SP_SUB = 0x00000002 # operand value is substracted from the pointer
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#
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# processor_t.flag
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#
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PR_SEGS = 0x000001 # has segment registers?
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PR_USE32 = 0x000002 # supports 32-bit addressing?
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PR_DEFSEG32 = 0x000004 # segments are 32-bit by default
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PR_RNAMESOK = 0x000008 # allow to user register names for location names
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PR_ADJSEGS = 0x000020 # IDA may adjust segments moving their starting/ending addresses.
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PR_DEFNUM = 0x0000C0 # default number representation:
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PRN_HEX = 0x000000 # hex
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PRN_OCT = 0x000040 # octal
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PRN_DEC = 0x000080 # decimal
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PRN_BIN = 0x0000C0 # binary
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PR_WORD_INS = 0x000100 # instruction codes are grouped 2bytes in binrary line prefix
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PR_NOCHANGE = 0x000200 # The user can't change segments and code/data attributes (display only)
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PR_ASSEMBLE = 0x000400 # Module has a built-in assembler and understands IDP_ASSEMBLE
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PR_ALIGN = 0x000800 # All data items should be aligned properly
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PR_TYPEINFO = 0x001000 # the processor module supports
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# type information callbacks
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# ALL OF THEM SHOULD BE IMPLEMENTED!
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# (the ones >= decorate_name)
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PR_USE64 = 0x002000 # supports 64-bit addressing?
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PR_SGROTHER = 0x004000 # the segment registers don't contain
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# the segment selectors, something else
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PR_STACK_UP = 0x008000 # the stack grows up
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PR_BINMEM = 0x010000 # the processor module provides correct
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# segmentation for binary files
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# (i.e. it creates additional segments)
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# The kernel will not ask the user
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# to specify the RAM/ROM sizes
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PR_SEGTRANS = 0x020000 # the processor module supports
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# the segment translation feature
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# (it means it calculates the code
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# addresses using the codeSeg() function)
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PR_CHK_XREF = 0x040000 # don't allow near xrefs between segments
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# with different bases
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PR_NO_SEGMOVE = 0x080000 # the processor module doesn't support move_segm()
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# (i.e. the user can't move segments)
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PR_FULL_HIFXP = 0x100000 # REF_VHIGH operand value contains full operand
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# not only the high bits. Meaningful if ph.high_fixup_bits
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PR_USE_ARG_TYPES = 0x200000 # use ph.use_arg_types callback
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PR_SCALE_STKVARS = 0x400000 # use ph.get_stkvar_scale callback
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PR_DELAYED = 0x800000 # has delayed jumps and calls
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PR_ALIGN_INSN = 0x1000000 # allow ida to create alignment instructions
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# arbirtrarily. Since these instructions
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# might lead to other wrong instructions
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# and spoil the listing, IDA does not create
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# them by default anymore
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PR_PURGING = 0x2000000 # there are calling conventions which may
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# purge bytes from the stack
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PR_CNDINSNS = 0x4000000 # has conditional instructions
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PR_USE_TBYTE = 0x8000000 # BTMT_SPECFLT means _TBYTE type
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PR_DEFSEG64 = 0x10000000 # segments are 64-bit by default
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# ----------------------------------------------------------------------
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OOF_SIGNMASK = 0x0003 # sign symbol (+/-) output:
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OOFS_IFSIGN = 0x0000 # output sign if needed
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OOFS_NOSIGN = 0x0001 # don't output sign, forbid the user to change the sign
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OOFS_NEEDSIGN = 0x0002 # always out sign (+-)
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OOF_SIGNED = 0x0004 # output as signed if < 0
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OOF_NUMBER = 0x0008 # always as a number
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OOF_WIDTHMASK = 0x0070 # width of value in bits:
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OOFW_IMM = 0x0000 # take from x.dtyp
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OOFW_8 = 0x0010 # 8 bit width
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OOFW_16 = 0x0020 # 16 bit width
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OOFW_24 = 0x0030 # 24 bit width
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OOFW_32 = 0x0040 # 32 bit width
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OOFW_64 = 0x0050 # 32 bit width
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OOF_ADDR = 0x0080 # output x.addr, otherwise x.value
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OOF_OUTER = 0x0100 # output outer operand
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OOF_ZSTROFF = 0x0200 # meaningful only if isStroff(uFlag)
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# append a struct field name if
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# the field offset is zero?
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# if AFL_ZSTROFF is set, then this flag
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# is ignored.
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OOF_NOBNOT = 0x0400 # prohibit use of binary not
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OOF_SPACES = 0x0800 # do not suppress leading spaces
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# currently works only for floating point numbers
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# ----------------------------------------------------------------------
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class insn_t(object):
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def __init__(self, noperands = UA_MAXOP):
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self.auxpref = 0
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self.cs = 0
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self.ea = 0
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self.flags = 0
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self.insnpref = 0
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self.ip = 0
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self.itype = 0
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self.n = 0
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self.segpref = 0
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self.size = 0
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self.Operands = []
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# store the number of operands
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self.n = noperands
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# create operands
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for i in xrange(0, noperands):
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op = op_t()
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op.n = i
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self.Operands.append(op)
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|
setattr(self, 'Op%d' % (i+1), op)
|
|
|
|
|
def __getitem__(self, i):
|
|
|
|
|
return self.Operands[i]
|
|
|
|
|
|
|
|
|
|
# ----------------------------------------------------------------------
|
|
|
|
|
class op_t(object):
|
|
|
|
|
def __init__(self):
|
|
|
|
|
self.addr = 0
|
|
|
|
|
self.dtyp = 0
|
|
|
|
|
self.flags = 0
|
|
|
|
|
self.n = 0
|
|
|
|
|
self.offb = 0
|
|
|
|
|
self.offo = 0
|
|
|
|
|
self.reg = 0
|
|
|
|
|
self.specval = 0
|
|
|
|
|
self.specflag1 = 0
|
|
|
|
|
self.specflag2 = 0
|
|
|
|
|
self.specflag3 = 0
|
|
|
|
|
self.specflag4 = 0
|
|
|
|
|
self.type = 0
|
|
|
|
|
self.value = 0
|
|
|
|
|
|
|
|
|
|
# make sure reg and phrase have the same value
|
|
|
|
|
def __setattr__(self, name, value):
|
|
|
|
|
if name == 'reg' or name == 'phrase':
|
|
|
|
|
object.__setattr__(self, 'reg', value)
|
|
|
|
|
object.__setattr__(self, 'phrase', value)
|
|
|
|
|
else:
|
|
|
|
|
object.__setattr__(self, name, value)
|
