71 lines
1.1 KiB
ArmAsm
71 lines
1.1 KiB
ArmAsm
#define CPSR_IRQDIS 0x80
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#define CPSR_FIQDIS 0x40
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.arm
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.globl _dc_inval_entries
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.globl _dc_flush_entries
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.globl _dc_flush
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.globl _dc_inval
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.globl _ic_inval
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.globl _drain_write_buffer
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.globl _tlb_inval
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.globl irq_kill
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.globl irq_restore
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.text
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irq_kill:
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mrs r1, cpsr
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and r0, r1, #(CPSR_IRQDIS|CPSR_FIQDIS)
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orr r1, r1, #(CPSR_IRQDIS|CPSR_FIQDIS)
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msr cpsr_c, r1
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bx lr
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irq_restore:
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mrs r1, cpsr
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bic r1, r1, #(CPSR_IRQDIS|CPSR_FIQDIS)
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orr r1, r1, r0
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msr cpsr_c, r1
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bx lr
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_dc_inval_entries:
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mcr p15, 0, r0, c7, c6, 1
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add r0, #0x20
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subs r1, #1
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bne _dc_inval_entries
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bx lr
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_dc_flush_entries:
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mcr p15, 0, r0, c7, c10, 1
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add r0, #0x20
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subs r1, #1
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bne _dc_flush_entries
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bx lr
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_dc_flush:
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mrc p15, 0, pc, c7, c10, 3
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bne _dc_flush
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bx lr
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_dc_inval:
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mov r0, #0
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mcr p15, 0, r0, c7, c6, 0
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bx lr
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_ic_inval:
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mov r0, #0
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mcr p15, 0, r0, c7, c5, 0
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bx lr
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_drain_write_buffer:
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mov r0, #0
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mcr p15, 0, r0, c7, c10, 4
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bx lr
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_tlb_inval:
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mov r0, #0
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mcr p15, 0, r0, c8, c7
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bx lr
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