From 05cdbccc3882ecd5778371a95801951519eed5d7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?L=C3=A9o=20Lam?= Date: Tue, 19 Sep 2017 19:14:08 +0200 Subject: [PATCH] DSPSpy/Base: Clean up trailing whitespace --- Source/DSPSpy/tests/dsp_base.inc | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/Source/DSPSpy/tests/dsp_base.inc b/Source/DSPSpy/tests/dsp_base.inc index 29c992b1c3..55cff4af8e 100644 --- a/Source/DSPSpy/tests/dsp_base.inc +++ b/Source/DSPSpy/tests/dsp_base.inc @@ -106,7 +106,7 @@ MEM_LO: equ 0x0f7F jmp start_of_test ; This is where we jump when we're done testing, see above. -; We just fall into a loop, playing dead until someone resets the DSP. +; We just fall into a loop, playing dead until someone resets the DSP. end_of_test: nop jmp end_of_test @@ -156,7 +156,7 @@ irq: si @DIRQ, #0x0001 halt ; Through some magic this allows us to properly ack the exception in dspspy ;rti ; allow dumping of ucodes which cause exceptions...probably not safe at all - + ; DMA:s the current state of the registers back to the PowerPC. To do this, ; it must write the contents of all regs to DRAM. ; Unfortunately, this loop uses ar0 so it's best to use AR1 and friends for testing @@ -216,13 +216,13 @@ send_back: dma_copy: mrr $ax0.l, $ac1.m -; Wait for the CPU to send us a mail. +; Wait for the CPU to send us a mail. call 0x807e si @DMBH, #0x8888 si @DMBL, #0xfeeb si @DIRQ, #0x0001 - -; wait for the CPU to recieve our response before we execute the next op + +; wait for the CPU to recieve our response before we execute the next op call 0x8078 andi $ac0.m, #0x7fff lrs $ac1.m, @CMBL @@ -261,14 +261,14 @@ dma_copy: lrri $ac0.m, @$ar0 lrri $ac1.m, @$ar0 lr $ar0, @REGS_BASE - + ret ; from send_back - + ; If you are in set40 mode, use this instead of send_back if you want to stay ; in set40 mode. send_back_40: set16 - call send_back + call send_back set40 ret