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PPCAnalyst/JIT: add ability to easily toggle branch and carry merging

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This commit is contained in:
Fiora 2014-09-11 03:59:40 -07:00
parent 54129a8ca5
commit 08ac10d00a
4 changed files with 24 additions and 4 deletions
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2
Source/Core/Core/PowerPC/Jit64/Jit.cpp
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@ -177,6 +177,8 @@ void Jit64::Init()
code_block.m_gpa = &js.gpa; code_block.m_gpa = &js.gpa;
code_block.m_fpa = &js.fpa; code_block.m_fpa = &js.fpa;
analyzer.SetOption(PPCAnalyst::PPCAnalyzer::OPTION_CONDITIONAL_CONTINUE); analyzer.SetOption(PPCAnalyst::PPCAnalyzer::OPTION_CONDITIONAL_CONTINUE);
analyzer.SetOption(PPCAnalyst::PPCAnalyzer::OPTION_BRANCH_MERGE);
analyzer.SetOption(PPCAnalyst::PPCAnalyzer::OPTION_CARRY_MERGE);
} }
void Jit64::ClearCache() void Jit64::ClearCache()

3
Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp
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@ -287,6 +287,9 @@ void Jit64::reg_imm(UGeckoInstruction inst)
bool Jit64::CheckMergedBranch(int crf) bool Jit64::CheckMergedBranch(int crf)
{ {
if (!analyzer.HasOption(PPCAnalyst::PPCAnalyzer::OPTION_BRANCH_MERGE))
return false;
const UGeckoInstruction& next = js.next_inst; const UGeckoInstruction& next = js.next_inst;
return (((next.OPCD == 16 /* bcx */) || return (((next.OPCD == 16 /* bcx */) ||
((next.OPCD == 19) && (next.SUBOP10 == 528) /* bcctrx */) || ((next.OPCD == 19) && (next.SUBOP10 == 528) /* bcctrx */) ||

15
Source/Core/Core/PowerPC/PPCAnalyst.cpp
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@ -467,9 +467,13 @@ void PPCAnalyzer::ReorderInstructions(u32 instructions, CodeOp *code)
{ {
// For carry, bubble instructions *towards* each other; one direction often isn't enough // For carry, bubble instructions *towards* each other; one direction often isn't enough
// to get pairs like addc/adde next to each other. // to get pairs like addc/adde next to each other.
ReorderInstructionsCore(instructions, code, true, REORDER_CARRY); if (HasOption(OPTION_CARRY_MERGE))
ReorderInstructionsCore(instructions, code, false, REORDER_CARRY); {
ReorderInstructionsCore(instructions, code, false, REORDER_CMP); ReorderInstructionsCore(instructions, code, true, REORDER_CARRY);
ReorderInstructionsCore(instructions, code, false, REORDER_CARRY);
}
if (HasOption(OPTION_BRANCH_MERGE))
ReorderInstructionsCore(instructions, code, false, REORDER_CMP);
} }
void PPCAnalyzer::SetInstructionStats(CodeBlock *block, CodeOp *code, GekkoOPInfo *opinfo, u32 index) void PPCAnalyzer::SetInstructionStats(CodeBlock *block, CodeOp *code, GekkoOPInfo *opinfo, u32 index)
@ -509,7 +513,10 @@ void PPCAnalyzer::SetInstructionStats(CodeBlock *block, CodeOp *code, GekkoOPInf
// We're going to try to avoid storing carry in XER if we can avoid it -- keep it in the x86 carry flag! // We're going to try to avoid storing carry in XER if we can avoid it -- keep it in the x86 carry flag!
// If the instruction reads CA but doesn't write it, we still need to store CA in XER; we can't // If the instruction reads CA but doesn't write it, we still need to store CA in XER; we can't
// leave it in flags. // leave it in flags.
code->wantsCAInFlags = code->wantsCA && code->outputCA && opinfo->type == OPTYPE_INTEGER; if (HasOption(OPTION_CARRY_MERGE))
code->wantsCAInFlags = code->wantsCA && code->outputCA && opinfo->type == OPTYPE_INTEGER;
else
code->wantsCAInFlags = false;
// mfspr/mtspr can affect/use XER, so be super careful here // mfspr/mtspr can affect/use XER, so be super careful here
// we need to note specifically that mfspr needs CA in XER, not in the x86 carry flag // we need to note specifically that mfspr needs CA in XER, not in the x86 carry flag

8
Source/Core/Core/PowerPC/PPCAnalyst.h
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@ -183,6 +183,14 @@ public:
// Requires JIT support to work. // Requires JIT support to work.
// XXX: NOT COMPLETE // XXX: NOT COMPLETE
OPTION_FORWARD_JUMP = (1 << 3), OPTION_FORWARD_JUMP = (1 << 3),
// Reorder compare/Rc instructions next to their associated branches and
// merge in the JIT (for common cases, anyway).
OPTION_BRANCH_MERGE = (1 << 4),
// Reorder carry instructions next to their associated branches and pass
// carry flags in the x86 flags between them, instead of in XER.
OPTION_CARRY_MERGE = (1 << 5),
}; };