The-Homebrew-Cloud/dolphin
2
0
Fork 0
mirror of https://github.com/dolphin-emu/dolphin.git synced 2025-02-19 02:36:27 +01:00
Code Issues Packages Projects Releases Wiki Activity

Jit_Util: Make some OpArg parameters const references

Browse Source
This commit is contained in:
Lioncash 2015-05-28 23:44:18 -04:00
parent e3a6191f02
commit 0b8372e566
2 changed files with 8 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
Source/Core/Core/PowerPC/JitCommon/Jit_Util.cpp
View File

@ -156,7 +156,7 @@ private:
// Generate the proper MOV instruction depending on whether the read should // Generate the proper MOV instruction depending on whether the read should
// be sign extended or zero extended. // be sign extended or zero extended.
void MoveOpArgToReg(int sbits, Gen::OpArg arg) void MoveOpArgToReg(int sbits, const Gen::OpArg& arg)
{ {
if (m_sign_extend) if (m_sign_extend)
m_code->MOVSX(32, sbits, m_dst_reg, arg); m_code->MOVSX(32, sbits, m_dst_reg, arg);
@ -233,7 +233,7 @@ void EmuCodeBlock::MMIOLoadToReg(MMIO::Mapping* mmio, Gen::X64Reg reg_value,
} }
} }
FixupBranch EmuCodeBlock::CheckIfSafeAddress(OpArg reg_value, X64Reg reg_addr, BitSet32 registers_in_use, u32 mem_mask) FixupBranch EmuCodeBlock::CheckIfSafeAddress(const OpArg& reg_value, X64Reg reg_addr, BitSet32 registers_in_use, u32 mem_mask)
{ {
registers_in_use[reg_addr] = true; registers_in_use[reg_addr] = true;
if (reg_value.IsSimpleReg()) if (reg_value.IsSimpleReg())
@ -397,7 +397,7 @@ void EmuCodeBlock::SafeLoadToReg(X64Reg reg_value, const Gen::OpArg & opAddress,
} }
} }
static OpArg SwapImmediate(int accessSize, OpArg reg_value) static OpArg SwapImmediate(int accessSize, const OpArg& reg_value)
{ {
if (accessSize == 32) if (accessSize == 32)
return Imm32(Common::swap32(reg_value.Imm32())); return Imm32(Common::swap32(reg_value.Imm32()));
@ -640,7 +640,7 @@ void EmuCodeBlock::WriteToConstRamAddress(int accessSize, OpArg arg, u32 address
MOV(accessSize, MRegSum(RMEM, RSCRATCH2), R(reg)); MOV(accessSize, MRegSum(RMEM, RSCRATCH2), R(reg));
} }
void EmuCodeBlock::ForceSinglePrecision(X64Reg output, OpArg input, bool packed, bool duplicate) void EmuCodeBlock::ForceSinglePrecision(X64Reg output, const OpArg& input, bool packed, bool duplicate)
{ {
// Most games don't need these. Zelda requires it though - some platforms get stuck without them. // Most games don't need these. Zelda requires it though - some platforms get stuck without them.
if (jit->jo.accurateSinglePrecision) if (jit->jo.accurateSinglePrecision)
@ -755,7 +755,7 @@ static const u64 GC_ALIGNED16(psRoundBit[2]) = {0x8000000, 0x8000000};
// a single precision multiply. To be precise, it drops the low 28 bits of the mantissa, // a single precision multiply. To be precise, it drops the low 28 bits of the mantissa,
// rounding to nearest as it does. // rounding to nearest as it does.
// It needs a temp, so let the caller pass that in. // It needs a temp, so let the caller pass that in.
void EmuCodeBlock::Force25BitPrecision(X64Reg output, OpArg input, X64Reg tmp) void EmuCodeBlock::Force25BitPrecision(X64Reg output, const OpArg& input, X64Reg tmp)
{ {
if (jit->jo.accurateSinglePrecision) if (jit->jo.accurateSinglePrecision)
{ {

6
Source/Core/Core/PowerPC/JitCommon/Jit_Util.h
View File

@ -68,7 +68,7 @@ public:
SetCodePtr(nearcode); SetCodePtr(nearcode);
} }
Gen::FixupBranch CheckIfSafeAddress(Gen::OpArg reg_value, Gen::X64Reg reg_addr, BitSet32 registers_in_use, u32 mem_mask); Gen::FixupBranch CheckIfSafeAddress(const Gen::OpArg& reg_value, Gen::X64Reg reg_addr, BitSet32 registers_in_use, u32 mem_mask);
void UnsafeLoadRegToReg(Gen::X64Reg reg_addr, Gen::X64Reg reg_value, int accessSize, s32 offset = 0, bool signExtend = false); void UnsafeLoadRegToReg(Gen::X64Reg reg_addr, Gen::X64Reg reg_value, int accessSize, s32 offset = 0, bool signExtend = false);
void UnsafeLoadRegToRegNoSwap(Gen::X64Reg reg_addr, Gen::X64Reg reg_value, int accessSize, s32 offset, bool signExtend = false); void UnsafeLoadRegToRegNoSwap(Gen::X64Reg reg_addr, Gen::X64Reg reg_value, int accessSize, s32 offset, bool signExtend = false);
// these return the address of the MOV, for backpatching // these return the address of the MOV, for backpatching
@ -121,8 +121,8 @@ public:
void avx_op(void (Gen::XEmitter::*avxOp)(Gen::X64Reg, Gen::X64Reg, const Gen::OpArg&, u8), void (Gen::XEmitter::*sseOp)(Gen::X64Reg, const Gen::OpArg&, u8), void avx_op(void (Gen::XEmitter::*avxOp)(Gen::X64Reg, Gen::X64Reg, const Gen::OpArg&, u8), void (Gen::XEmitter::*sseOp)(Gen::X64Reg, const Gen::OpArg&, u8),
Gen::X64Reg regOp, const Gen::OpArg& arg1, const Gen::OpArg& arg2, u8 imm); Gen::X64Reg regOp, const Gen::OpArg& arg1, const Gen::OpArg& arg2, u8 imm);
void ForceSinglePrecision(Gen::X64Reg output, Gen::OpArg input, bool packed = true, bool duplicate = false); void ForceSinglePrecision(Gen::X64Reg output, const Gen::OpArg& input, bool packed = true, bool duplicate = false);
void Force25BitPrecision(Gen::X64Reg output, Gen::OpArg input, Gen::X64Reg tmp); void Force25BitPrecision(Gen::X64Reg output, const Gen::OpArg& input, Gen::X64Reg tmp);
// RSCRATCH might get trashed // RSCRATCH might get trashed
void ConvertSingleToDouble(Gen::X64Reg dst, Gen::X64Reg src, bool src_is_gpr = false); void ConvertSingleToDouble(Gen::X64Reg dst, Gen::X64Reg src, bool src_is_gpr = false);